david.venhoff/QEMU-Nyx-fork
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR

Browse Source 
The operands for MAQ_SA_W.PHL/MAQ_SA_W.PHR must in specified format.
Otherwise, the results are unpredictable. Once the operands were corrected
in the tests (part of this change), a bug in mipsdsp_mul_q15_q15 became
visible.

This change corrects the tests for MAQ_SA_W.PHL/MAQ_SA_W.PHR and fixes
sign-related issue in mipsdsp_mul_q15_q15. It also removes unnecessary
comment.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
This commit is contained in:
Petar Jovanovic 2013-04-15 13:54:07 +02:00 committed by Aurelien Jarno
parent e3d142d073
commit b1ca31d7ce
3 changed files with 19 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
target-mips/dsp_helper.c
View File

@ -269,18 +269,6 @@ static inline int32_t mipsdsp_sat32_acc_q31(int32_t acc, int32_t a,
temp31 = (temp_sum >> 31) & 0x01; temp31 = (temp_sum >> 31) & 0x01;
result = temp_sum & 0xFFFFFFFF; result = temp_sum & 0xFFFFFFFF;
/* FIXME
This sat function may wrong, because user manual wrote:
temp127..0 ← temp + ( (signA) || a31..0
if ( temp32 ≠ temp31 ) then
if ( temp32 = 0 ) then
temp31..0 ← 0x80000000
else
temp31..0 ← 0x7FFFFFFF
endif
DSPControlouflag:16+acc ← 1
endif
*/
if (temp32 != temp31) { if (temp32 != temp31) {
if (temp32 == 0) { if (temp32 == 0) {
result = 0x7FFFFFFF; result = 0x7FFFFFFF;
@ -578,7 +566,7 @@ static inline int32_t mipsdsp_mul_q15_q15(int32_t ac, uint16_t a, uint16_t b,
temp = 0x7FFFFFFF; temp = 0x7FFFFFFF;
set_DSPControl_overflow_flag(1, 16 + ac, env); set_DSPControl_overflow_flag(1, 16 + ac, env);
} else { } else {
temp = ((uint32_t)a * (uint32_t)b) << 1; temp = ((int16_t)a * (int16_t)b) << 1;
} }
return temp; return temp;

12
tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c
View File

@ -10,12 +10,12 @@ int main()
int resulth, resultl; int resulth, resultl;
int resdsp; int resdsp;
achi = 0x05; achi = 0x00000000;
acli = 0xB4CB; acli = 0x0000B4CB;
rs = 0xFF060000; rs = 0xFF060000;
rt = 0xCB000000; rt = 0xCB000000;
resulth = 0x00; resulth = 0x00000000;
resultl = 0x7FFFFFFF; resultl = 0x006838CB;
__asm __asm
("mthi %2, $ac1\n\t" ("mthi %2, $ac1\n\t"
@ -29,8 +29,8 @@ int main()
assert(resulth == acho); assert(resulth == acho);
assert(resultl == aclo); assert(resultl == aclo);
achi = 0x06; achi = 0x00000000;
acli = 0xB4CB; acli = 0x0000B4CB;
rs = 0x80000000; rs = 0x80000000;
rt = 0x80000000; rt = 0x80000000;
resulth = 0x00; resulth = 0x00;

24
tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c
View File

@ -10,12 +10,12 @@ int main()
int resulth, resultl; int resulth, resultl;
int resdsp; int resdsp;
achi = 0x05; achi = 0x00000000;
acli = 0xB4CB; acli = 0x0000B4CB;
rs = 0xFF06; rs = 0x0000FF06;
rt = 0xCB00; rt = 0x0000CB00;
resulth = 0x00; resulth = 0x00000000;
resultl = 0x7FFFFFFF; resultl = 0x006838CB;
__asm __asm
("mthi %2, $ac1\n\t" ("mthi %2, $ac1\n\t"
@ -29,12 +29,12 @@ int main()
assert(resulth == acho); assert(resulth == acho);
assert(resultl == aclo); assert(resultl == aclo);
achi = 0x06; achi = 0x00000000;
acli = 0xB4CB; acli = 0x0000B4CB;
rs = 0x8000; rs = 0x00008000;
rt = 0x8000; rt = 0x00008000;
resulth = 0x00; resulth = 0x00000000;
resultl = 0x7fffffff; resultl = 0x7FFFFFFF;
resdsp = 0x01; resdsp = 0x01;
__asm __asm