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Rename variables and rearrange code to please gcc -Wshadow checks

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3023 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-06-25 19:56:13 +00:00
parent 46525e1fbe
commit b3ceef24f4
3 changed files with 32 additions and 29 deletions
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14
hw/slavio_serial.c
View File

@ -354,7 +354,7 @@ static void slavio_serial_update_parameters(ChannelState *s)
static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{ {
SerialState *ser = opaque; SerialState *serial = opaque;
ChannelState *s; ChannelState *s;
uint32_t saddr; uint32_t saddr;
int newreg, channel; int newreg, channel;
@ -362,7 +362,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
val &= 0xff; val &= 0xff;
saddr = (addr & 3) >> 1; saddr = (addr & 3) >> 1;
channel = (addr & SERIAL_MAXADDR) >> 2; channel = (addr & SERIAL_MAXADDR) >> 2;
s = &ser->chn[channel]; s = &serial->chn[channel];
switch (saddr) { switch (saddr) {
case 0: case 0:
SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff); SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff);
@ -407,13 +407,13 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
default: default:
break; break;
case 0x40: case 0x40:
slavio_serial_reset_chn(&ser->chn[1]); slavio_serial_reset_chn(&serial->chn[1]);
return; return;
case 0x80: case 0x80:
slavio_serial_reset_chn(&ser->chn[0]); slavio_serial_reset_chn(&serial->chn[0]);
return; return;
case 0xc0: case 0xc0:
slavio_serial_reset(ser); slavio_serial_reset(serial);
return; return;
} }
break; break;
@ -446,7 +446,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr)
{ {
SerialState *ser = opaque; SerialState *serial = opaque;
ChannelState *s; ChannelState *s;
uint32_t saddr; uint32_t saddr;
uint32_t ret; uint32_t ret;
@ -454,7 +454,7 @@ static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr)
saddr = (addr & 3) >> 1; saddr = (addr & 3) >> 1;
channel = (addr & SERIAL_MAXADDR) >> 2; channel = (addr & SERIAL_MAXADDR) >> 2;
s = &ser->chn[channel]; s = &serial->chn[channel];
switch (saddr) { switch (saddr) {
case 0: case 0:
SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]); SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]);

43
hw/sun4m.c
View File

@ -154,8 +154,6 @@ static void nvram_finish_partition (m48t59_t *nvram, uint32_t start,
m48t59_write(nvram, start + 1, sum & 0xff); m48t59_write(nvram, start + 1, sum & 0xff);
} }
static m48t59_t *nvram;
extern int nographic; extern int nographic;
static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline, static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
@ -292,13 +290,13 @@ static void secondary_cpu_reset(void *opaque)
env->halted = 1; env->halted = 1;
} }
static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
DisplayState *ds, const char *cpu_model) DisplayState *ds, const char *cpu_model)
{ {
CPUState *env, *envs[MAX_CPUS]; CPUState *env, *envs[MAX_CPUS];
unsigned int i; unsigned int i;
void *iommu, *espdma, *ledma, *main_esp; void *iommu, *espdma, *ledma, *main_esp, *nvram;
const sparc_def_t *def; const sparc_def_t *def;
qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq, qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
*espdma_irq, *ledma_irq; *espdma_irq, *ledma_irq;
@ -328,7 +326,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS); cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
/* allocate RAM */ /* allocate RAM */
cpu_register_physical_memory(0, ram_size, 0); cpu_register_physical_memory(0, RAM_size, 0);
iommu = iommu_init(hwdef->iommu_base); iommu = iommu_init(hwdef->iommu_base);
slavio_intctl = slavio_intctl_init(hwdef->intctl_base, slavio_intctl = slavio_intctl_init(hwdef->intctl_base,
@ -347,7 +345,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
exit (1); exit (1);
} }
tcx_init(ds, hwdef->tcx_base, phys_ram_base + ram_size, ram_size, tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth); hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
if (nd_table[0].model == NULL if (nd_table[0].model == NULL
@ -388,13 +386,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
slavio_irq[hwdef->me_irq]); slavio_irq[hwdef->me_irq]);
if (hwdef->cs_base != (target_phys_addr_t)-1) if (hwdef->cs_base != (target_phys_addr_t)-1)
cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
return nvram;
} }
static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device, static void sun4m_load_kernel(long vram_size, int RAM_size, int boot_device,
const char *kernel_filename, const char *kernel_filename,
const char *kernel_cmdline, const char *kernel_cmdline,
const char *initrd_filename, const char *initrd_filename,
int machine_id) int machine_id,
void *nvram)
{ {
int ret, linux_boot; int ret, linux_boot;
char buf[1024]; char buf[1024];
@ -403,7 +404,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device,
linux_boot = (kernel_filename != NULL); linux_boot = (kernel_filename != NULL);
prom_offset = ram_size + vram_size; prom_offset = RAM_size + vram_size;
cpu_register_physical_memory(PROM_ADDR, cpu_register_physical_memory(PROM_ADDR,
(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK,
prom_offset | IO_MEM_ROM); prom_offset | IO_MEM_ROM);
@ -451,7 +452,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device,
} }
} }
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
boot_device, ram_size, kernel_size, graphic_width, boot_device, RAM_size, kernel_size, graphic_width,
graphic_height, graphic_depth, machine_id); graphic_height, graphic_depth, machine_id);
} }
@ -524,46 +525,48 @@ static const struct hwdef hwdefs[] = {
}, },
}; };
static void sun4m_common_init(int ram_size, int boot_device, DisplayState *ds, static void sun4m_common_init(int RAM_size, int boot_device, DisplayState *ds,
const char *kernel_filename, const char *kernel_cmdline, const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model, const char *initrd_filename, const char *cpu_model,
unsigned int machine, int max_ram) unsigned int machine, int max_ram)
{ {
if ((unsigned int)ram_size > (unsigned int)max_ram) { void *nvram;
if ((unsigned int)RAM_size > (unsigned int)max_ram) {
fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n", fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
(unsigned int)ram_size / (1024 * 1024), (unsigned int)RAM_size / (1024 * 1024),
(unsigned int)max_ram / (1024 * 1024)); (unsigned int)max_ram / (1024 * 1024));
exit(1); exit(1);
} }
sun4m_hw_init(&hwdefs[machine], ram_size, ds, cpu_model); nvram = sun4m_hw_init(&hwdefs[machine], RAM_size, ds, cpu_model);
sun4m_load_kernel(hwdefs[machine].vram_size, ram_size, boot_device, sun4m_load_kernel(hwdefs[machine].vram_size, RAM_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename, kernel_filename, kernel_cmdline, initrd_filename,
hwdefs[machine].machine_id); hwdefs[machine].machine_id, nvram);
} }
/* SPARCstation 5 hardware initialisation */ /* SPARCstation 5 hardware initialisation */
static void ss5_init(int ram_size, int vga_ram_size, int boot_device, static void ss5_init(int RAM_size, int vga_ram_size, int boot_device,
DisplayState *ds, const char **fd_filename, int snapshot, DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline, const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model) const char *initrd_filename, const char *cpu_model)
{ {
if (cpu_model == NULL) if (cpu_model == NULL)
cpu_model = "Fujitsu MB86904"; cpu_model = "Fujitsu MB86904";
sun4m_common_init(ram_size, boot_device, ds, kernel_filename, sun4m_common_init(RAM_size, boot_device, ds, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, kernel_cmdline, initrd_filename, cpu_model,
0, 0x10000000); 0, 0x10000000);
} }
/* SPARCstation 10 hardware initialisation */ /* SPARCstation 10 hardware initialisation */
static void ss10_init(int ram_size, int vga_ram_size, int boot_device, static void ss10_init(int RAM_size, int vga_ram_size, int boot_device,
DisplayState *ds, const char **fd_filename, int snapshot, DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline, const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model) const char *initrd_filename, const char *cpu_model)
{ {
if (cpu_model == NULL) if (cpu_model == NULL)
cpu_model = "TI SuperSparc II"; cpu_model = "TI SuperSparc II";
sun4m_common_init(ram_size, boot_device, ds, kernel_filename, sun4m_common_init(RAM_size, boot_device, ds, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, kernel_cmdline, initrd_filename, cpu_model,
1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok 1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok
} }

2
hw/tcx.c
View File

@ -180,7 +180,7 @@ static void tcx_update_display(void *opaque)
ram_addr_t page, page_min, page_max; ram_addr_t page, page_min, page_max;
int y, y_start, dd, ds; int y, y_start, dd, ds;
uint8_t *d, *s; uint8_t *d, *s;
void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width); void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width);
if (ts->ds->depth == 0) if (ts->ds->depth == 0)
return; return;