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target-mips: Add comments on POOL32Axf encoding

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Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
and microMIPS32 DSP. Add comment here to help reading.

Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
陳韋任 (Wei-Ren Chen) 2012-11-21 13:50:45 +08:00 committed by Aurelien Jarno
parent 44e04d3b94
commit d132c79f6b
1 changed files with 17 additions and 0 deletions
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17
target-mips/translate.c
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@ -10359,6 +10359,19 @@ enum {
/* POOL32AXF encoding of minor opcode field extension */ /* POOL32AXF encoding of minor opcode field extension */
/*
* 1. MIPS Architecture for Programmers Volume II-B:
* The microMIPS32 Instruction Set (Revision 3.05)
*
* Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field
*
* 2. MIPS Architecture for Programmers VolumeIV-e:
* The MIPS DSP Application-Specific Extension
* to the microMIPS32 Architecture (Revision 2.34)
*
* Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field
*/
enum { enum {
/* bits 11..6 */ /* bits 11..6 */
TEQ = 0x00, TEQ = 0x00,
@ -10371,6 +10384,8 @@ enum {
MFC0 = 0x03, MFC0 = 0x03,
MTC0 = 0x0b, MTC0 = 0x0b,
/* begin of microMIPS32 DSP */
/* bits 13..12 for 0x01 */ /* bits 13..12 for 0x01 */
MFHI_ACC = 0x0, MFHI_ACC = 0x0,
MFLO_ACC = 0x1, MFLO_ACC = 0x1,
@ -10387,6 +10402,8 @@ enum {
MULT_ACC = 0x0, MULT_ACC = 0x0,
MULTU_ACC = 0x1, MULTU_ACC = 0x1,
/* end of microMIPS32 DSP */
/* bits 15..12 for 0x2c */ /* bits 15..12 for 0x2c */
SEB = 0x2, SEB = 0x2,
SEH = 0x3, SEH = 0x3,