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arm: Move condition-failed codepath generation out of if()

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Move the code to generate the "condition failed" instruction
codepath out of the if (singlestepping) {} else {}. This
will allow adding support for handling a new is_jmp type
which can't be neatly split into "singlestepping case"
versus "not singlestepping case".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1491844419-12485-6-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2017-04-20 17:32:30 +01:00
parent 4d5e8c969a
commit f021b2c462
1 changed files with 11 additions and 13 deletions
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18
target/arm/translate.c
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@ -11988,9 +11988,9 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
/* At this stage dc->condjmp will only be set when the skipped /* At this stage dc->condjmp will only be set when the skipped
instruction was a conditional branch or trap, and the PC has instruction was a conditional branch or trap, and the PC has
already been written. */ already been written. */
gen_set_condexec(dc);
if (unlikely(cs->singlestep_enabled || dc->ss_active)) { if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
/* Unconditional and "condition passed" instruction codepath. */ /* Unconditional and "condition passed" instruction codepath. */
gen_set_condexec(dc);
switch (dc->is_jmp) { switch (dc->is_jmp) {
case DISAS_SWI: case DISAS_SWI:
gen_ss_advance(dc); gen_ss_advance(dc);
@ -12013,13 +12013,6 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
/* FIXME: Single stepping a WFI insn will not halt the CPU. */ /* FIXME: Single stepping a WFI insn will not halt the CPU. */
gen_singlestep_exception(dc); gen_singlestep_exception(dc);
} }
if (dc->condjmp) {
/* "Condition failed" instruction codepath. */
gen_set_label(dc->condlabel);
gen_set_condexec(dc);
gen_set_pc_im(dc, dc->pc);
gen_singlestep_exception(dc);
}
} else { } else {
/* While branches must always occur at the end of an IT block, /* While branches must always occur at the end of an IT block,
there are a few other things that can cause us to terminate there are a few other things that can cause us to terminate
@ -12029,7 +12022,6 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
- Hardware watchpoints. - Hardware watchpoints.
Hardware breakpoints have already been handled and skip this code. Hardware breakpoints have already been handled and skip this code.
*/ */
gen_set_condexec(dc);
switch(dc->is_jmp) { switch(dc->is_jmp) {
case DISAS_NEXT: case DISAS_NEXT:
gen_goto_tb(dc, 1, dc->pc); gen_goto_tb(dc, 1, dc->pc);
@ -12069,11 +12061,17 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
gen_exception(EXCP_SMC, syn_aa32_smc(), 3); gen_exception(EXCP_SMC, syn_aa32_smc(), 3);
break; break;
} }
}
if (dc->condjmp) { if (dc->condjmp) {
/* "Condition failed" instruction codepath for the branch/trap insn */
gen_set_label(dc->condlabel); gen_set_label(dc->condlabel);
gen_set_condexec(dc); gen_set_condexec(dc);
if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
gen_set_pc_im(dc, dc->pc);
gen_singlestep_exception(dc);
} else {
gen_goto_tb(dc, 1, dc->pc); gen_goto_tb(dc, 1, dc->pc);
dc->condjmp = 0;
} }
} }