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hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities

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Absence of any Extended Capabilities is required to be
indicated by an Extended Capability header with a Capability ID of
0000h, a Capability Version of 0h, and a Next Capability Offset of 000h.

Instead of inserting a 'NULL' capability is simpler to mark the start
of the Extended Configuration Space as read-only to achieve the same
behaviour.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Marcel Apfelbaum 2017-02-20 22:43:10 +02:00 committed by Michael S. Tsirkin
parent 1883ff34b5
commit f03d8ea330
4 changed files with 14 additions and 0 deletions
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2
hw/pci/pci.c
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@ -64,6 +64,8 @@ static Property pci_props[] = {
QEMU_PCI_CAP_SERR_BITNR, true), QEMU_PCI_CAP_SERR_BITNR, true),
DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
QEMU_PCIE_LNKSTA_DLLLA_BITNR, true), QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present,
QEMU_PCIE_EXTCAP_INIT_BITNR, true),
DEFINE_PROP_END_OF_LIST() DEFINE_PROP_END_OF_LIST()
}; };

6
hw/pci/pcie.c
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@ -109,6 +109,12 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB); pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) {
/* read-only to behave like a 'NULL' Extended Capability Header */
pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
}
return pos; return pos;
} }

4
include/hw/compat.h
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@ -18,6 +18,10 @@
.driver = "pci-bridge",\ .driver = "pci-bridge",\
.property = "shpc",\ .property = "shpc",\
.value = "on",\ .value = "on",\
},{\
.driver = TYPE_PCI_DEVICE,\
.property = "x-pcie-extcap-init",\
.value = "off",\
}, },
#define HW_COMPAT_2_7 \ #define HW_COMPAT_2_7 \

2
include/hw/pci/pci.h
View File

@ -183,6 +183,8 @@ enum {
/* Link active status in endpoint capability is always set */ /* Link active status in endpoint capability is always set */
#define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8 #define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8
QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR), QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR),
#define QEMU_PCIE_EXTCAP_INIT_BITNR 9
QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR),
}; };
#define TYPE_PCI_DEVICE "pci-device" #define TYPE_PCI_DEVICE "pci-device"