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vmxnet3: Change offsets of msi/msix pci capabilities

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Place device reported PCI capabilities at the same offsets as placed by
the VMware virtual hardware: MSI at [84], MSI-X at [9c].

Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
This commit is contained in:
Shmulik Ladkani 2015-12-24 09:17:35 +02:00 committed by Jason Wang
parent 671f66f87f
commit f9262dae13
1 changed files with 15 additions and 3 deletions
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18
hw/net/vmxnet3.c
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@ -36,6 +36,16 @@
#define VMXNET3_MSIX_BAR_SIZE 0x2000 #define VMXNET3_MSIX_BAR_SIZE 0x2000
#define MIN_BUF_SIZE 60 #define MIN_BUF_SIZE 60
/* Compatability flags for migration */
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
(1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
#define VMXNET3_MSI_OFFSET(s) \
((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x50 : 0x84)
#define VMXNET3_MSIX_OFFSET(s) \
((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0 : 0x9c)
#define VMXNET3_BAR0_IDX (0) #define VMXNET3_BAR0_IDX (0)
#define VMXNET3_BAR1_IDX (1) #define VMXNET3_BAR1_IDX (1)
#define VMXNET3_MSIX_BAR_IDX (2) #define VMXNET3_MSIX_BAR_IDX (2)
@ -313,6 +323,9 @@ typedef struct {
MACAddr *mcast_list; MACAddr *mcast_list;
uint32_t mcast_list_len; uint32_t mcast_list_len;
uint32_t mcast_list_buff_size; /* needed for live migration. */ uint32_t mcast_list_buff_size; /* needed for live migration. */
/* Compatability flags for migration */
uint32_t compat_flags;
} VMXNET3State; } VMXNET3State;
/* Interrupt management */ /* Interrupt management */
@ -2131,7 +2144,7 @@ vmxnet3_init_msix(VMXNET3State *s)
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE, VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE,
&s->msix_bar, &s->msix_bar,
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA, VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA,
0); VMXNET3_MSIX_OFFSET(s));
if (0 > res) { if (0 > res) {
VMW_WRPRN("Failed to initialize MSI-X, error %d", res); VMW_WRPRN("Failed to initialize MSI-X, error %d", res);
@ -2159,7 +2172,6 @@ vmxnet3_cleanup_msix(VMXNET3State *s)
} }
} }
#define VMXNET3_MSI_OFFSET (0x50)
#define VMXNET3_USE_64BIT (true) #define VMXNET3_USE_64BIT (true)
#define VMXNET3_PER_VECTOR_MASK (false) #define VMXNET3_PER_VECTOR_MASK (false)
@ -2169,7 +2181,7 @@ vmxnet3_init_msi(VMXNET3State *s)
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
int res; int res;
res = msi_init(d, VMXNET3_MSI_OFFSET, VMXNET3_MAX_NMSIX_INTRS, res = msi_init(d, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS,
VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK); VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK);
if (0 > res) { if (0 > res) {
VMW_WRPRN("Failed to initialize MSI, error %d", res); VMW_WRPRN("Failed to initialize MSI, error %d", res);