Sebastian Macke 352367e8bb target-openrisc: Speed up move instruction
The OpenRISC architecture does not have its own move register
instruction. Instead it uses either "l.addi rd, r0, x" or
"l.ori rd, rs, 0" or "l.or rd, rx, r0"

The l.ori instruction is automatically optimized but not the l.addi instruction.
This patch optimizes for this special case.

Signed-off-by: Sebastian Macke <sebastian@macke.de>
Reviewed-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
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Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
Description
A fork of QEMU-Nyx which is better suited for my bachelors thesis
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