PowerPC CPUs have had two ways to read the time base for quite some time now. They provide it using the mfspr instruction or - if a special bit is set in that opcode - using mftb. For timekeeping we're currently using mftb. While trying to get Qemu up and running on an e500v2 system, I stumbled over the CPU not supporting mftbu. It just throws an illegal instruction trap. So let's read the SPR values instead. All PPC CPUs should support them anyways. I tested this patch on an e500v2 system where it makes qemu work and on my 970MP system with 32-bit user space where everything still works with this patch applied. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: malc <av1474@comtv.ru>
		
			
				
	
	
		
			240 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			240 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
#ifndef QEMU_TIMER_H
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#define QEMU_TIMER_H
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#include "qemu-common.h"
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/* timers */
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typedef struct QEMUClock QEMUClock;
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typedef void QEMUTimerCB(void *opaque);
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/* The real time clock should be used only for stuff which does not
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   change the virtual machine state, as it is run even if the virtual
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   machine is stopped. The real time clock has a frequency of 1000
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   Hz. */
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extern QEMUClock *rt_clock;
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/* The virtual clock is only run during the emulation. It is stopped
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   when the virtual machine is stopped. Virtual timers use a high
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   precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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/* The host clock should be use for device models that emulate accurate
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   real time sources. It will continue to run when the virtual machine
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   is suspended, and it will reflect system time changes the host may
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   undergo (e.g. due to NTP). The host clock has the same precision as
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   the virtual clock. */
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extern QEMUClock *host_clock;
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int64_t qemu_get_clock(QEMUClock *clock);
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int64_t qemu_get_clock_ns(QEMUClock *clock);
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void qemu_clock_enable(QEMUClock *clock, int enabled);
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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int qemu_timer_pending(QEMUTimer *ts);
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int qemu_timer_expired(QEMUTimer *timer_head, int64_t current_time);
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void qemu_run_all_timers(void);
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int qemu_alarm_pending(void);
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int64_t qemu_next_deadline(void);
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void configure_alarms(char const *opt);
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void configure_icount(const char *option);
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int qemu_calculate_timeout(void);
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void init_clocks(void);
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int init_timer_alarm(void);
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void quit_timers(void);
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static inline int64_t get_ticks_per_sec(void)
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{
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    return 1000000000LL;
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}
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void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
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void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
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/* ptimer.c */
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typedef struct ptimer_state ptimer_state;
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typedef void (*ptimer_cb)(void *opaque);
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ptimer_state *ptimer_init(QEMUBH *bh);
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void ptimer_set_period(ptimer_state *s, int64_t period);
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void ptimer_set_freq(ptimer_state *s, uint32_t freq);
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void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload);
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uint64_t ptimer_get_count(ptimer_state *s);
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void ptimer_set_count(ptimer_state *s, uint64_t count);
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void ptimer_run(ptimer_state *s, int oneshot);
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void ptimer_stop(ptimer_state *s);
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void qemu_put_ptimer(QEMUFile *f, ptimer_state *s);
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void qemu_get_ptimer(QEMUFile *f, ptimer_state *s);
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/* icount */
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int64_t qemu_icount_round(int64_t count);
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extern int64_t qemu_icount;
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extern int use_icount;
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extern int icount_time_shift;
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extern int64_t qemu_icount_bias;
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int64_t cpu_get_icount(void);
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/*******************************************/
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/* host CPU ticks (if available) */
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#if defined(_ARCH_PPC)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    int64_t retval;
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#ifdef _ARCH_PPC64
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    /* This reads timebase in one 64bit go and includes Cell workaround from:
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       http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027052.html
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    */
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    __asm__ __volatile__ ("mftb    %0\n\t"
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                          "cmpwi   %0,0\n\t"
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                          "beq-    $-8"
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                          : "=r" (retval));
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#else
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    /* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */
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    unsigned long junk;
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    __asm__ __volatile__ ("mfspr   %1,269\n\t"  /* mftbu */
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                          "mfspr   %L0,268\n\t" /* mftb */
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                          "mfspr   %0,269\n\t"  /* mftbu */
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                          "cmpw    %0,%1\n\t"
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                          "bne     $-16"
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                          : "=r" (retval), "=r" (junk));
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#endif
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    return retval;
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}
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#elif defined(__i386__)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    int64_t val;
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    asm volatile ("rdtsc" : "=A" (val));
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    return val;
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}
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#elif defined(__x86_64__)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    uint32_t low,high;
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    int64_t val;
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    asm volatile("rdtsc" : "=a" (low), "=d" (high));
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    val = high;
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    val <<= 32;
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    val |= low;
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    return val;
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}
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#elif defined(__hppa__)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    int val;
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    asm volatile ("mfctl %%cr16, %0" : "=r"(val));
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    return val;
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}
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#elif defined(__ia64)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    int64_t val;
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    asm volatile ("mov %0 = ar.itc" : "=r"(val) :: "memory");
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    return val;
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}
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#elif defined(__s390__)
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static inline int64_t cpu_get_real_ticks(void)
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{
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    int64_t val;
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    asm volatile("stck 0(%1)" : "=m" (val) : "a" (&val) : "cc");
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    return val;
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}
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#elif defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
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static inline int64_t cpu_get_real_ticks (void)
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{
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#if defined(_LP64)
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    uint64_t        rval;
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    asm volatile("rd %%tick,%0" : "=r"(rval));
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    return rval;
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#else
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    union {
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        uint64_t i64;
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        struct {
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            uint32_t high;
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            uint32_t low;
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        }       i32;
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    } rval;
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    asm volatile("rd %%tick,%1; srlx %1,32,%0"
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                 : "=r"(rval.i32.high), "=r"(rval.i32.low));
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    return rval.i64;
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#endif
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}
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#elif defined(__mips__) && \
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    ((defined(__mips_isa_rev) && __mips_isa_rev >= 2) || defined(__linux__))
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/*
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 * binutils wants to use rdhwr only on mips32r2
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 * but as linux kernel emulate it, it's fine
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 * to use it.
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 *
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 */
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#define MIPS_RDHWR(rd, value) {                         \
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        __asm__ __volatile__ (".set   push\n\t"         \
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                              ".set mips32r2\n\t"       \
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                              "rdhwr  %0, "rd"\n\t"     \
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                              ".set   pop"              \
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                              : "=r" (value));          \
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    }
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static inline int64_t cpu_get_real_ticks(void)
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{
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    /* On kernels >= 2.6.25 rdhwr <reg>, $2 and $3 are emulated */
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    uint32_t count;
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    static uint32_t cyc_per_count = 0;
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    if (!cyc_per_count) {
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        MIPS_RDHWR("$3", cyc_per_count);
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    }
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    MIPS_RDHWR("$2", count);
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    return (int64_t)(count * cyc_per_count);
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}
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#else
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/* The host CPU doesn't have an easily accessible cycle counter.
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   Just return a monotonically increasing value.  This will be
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   totally wrong, but hopefully better than nothing.  */
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static inline int64_t cpu_get_real_ticks (void)
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{
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    static int64_t ticks = 0;
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    return ticks++;
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}
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#endif
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#ifdef NEED_CPU_H
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/* Deterministic execution requires that IO only be performed on the last
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   instruction of a TB so that interrupts take effect immediately.  */
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static inline int can_do_io(CPUState *env)
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{
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    if (!use_icount)
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        return 1;
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    /* If not executing code then assume we are ok.  */
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    if (!env->current_tb)
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        return 1;
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    return env->can_do_io != 0;
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}
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#endif
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#endif
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