Peter Maydell 4b635cf7a9 hw/arm/armsse: Make SRAM bank size configurable
For the IoTKit the SRAM bank size is always 32K (15 bits); for the
SSE-200 this is a configurable parameter, which defaults to 32K but
can be changed when it is built into a particular SoC. For instance
the Musca-B1 board sets it to 128K (17 bits).

Make the bank size a QOM property. We follow the SSE-200 hardware in
naming the parameter SRAM_ADDR_WIDTH, which specifies the number of
address bits of a single SRAM bank.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-11-peter.maydell@linaro.org
2019-02-01 14:55:42 +00:00
..
2019-01-30 10:16:58 +01:00
2018-10-05 11:26:56 +02:00
2019-01-25 14:52:11 -05:00
2018-12-11 15:45:22 -02:00
2018-12-11 15:45:22 -02:00
2018-12-11 15:45:22 -02:00
2018-12-11 15:45:22 -02:00
2018-02-09 05:05:11 +01:00
2019-01-11 15:46:55 +01:00
2019-01-24 13:34:20 +01:00
2018-02-09 05:05:11 +01:00
2018-12-11 15:45:22 -02:00
2018-12-11 15:45:22 -02:00
2018-12-11 15:45:22 -02:00