 f68d881c9b
			
		
	
	
		f68d881c9b
		
	
	
	
	
		
			
			Instead of the bitband device doing a cpu_physical_memory_read/write, make it take a MemoryRegion which specifies where it should be accessing, and use address_space_read/write to access the corresponding AddressSpace. Since this entails pretty much a rewrite, convert away from old_mmio in the process. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487604965-23220-8-git-send-email-peter.maydell@linaro.org
		
			
				
	
	
		
			64 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * ARMv7M CPU object
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|  *
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|  * Copyright (c) 2017 Linaro Ltd
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|  * Written by Peter Maydell <peter.maydell@linaro.org>
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|  *
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|  * This code is licensed under the GPL version 2 or later.
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|  */
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| 
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| #ifndef HW_ARM_ARMV7M_H
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| #define HW_ARM_ARMV7M_H
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| 
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| #include "hw/sysbus.h"
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| #include "hw/arm/armv7m_nvic.h"
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| 
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| #define TYPE_BITBAND "ARM,bitband-memory"
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| #define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND)
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| 
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| typedef struct {
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|     /*< private >*/
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|     SysBusDevice parent_obj;
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|     /*< public >*/
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| 
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|     AddressSpace *source_as;
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|     MemoryRegion iomem;
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|     uint32_t base;
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|     MemoryRegion *source_memory;
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| } BitBandState;
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| 
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| #define TYPE_ARMV7M "armv7m"
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| #define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M)
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| 
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| #define ARMV7M_NUM_BITBANDS 2
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| 
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| /* ARMv7M container object.
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|  * + Unnamed GPIO input lines: external IRQ lines for the NVIC
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|  * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ
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|  * + Property "cpu-model": CPU model to instantiate
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|  * + Property "num-irq": number of external IRQ lines
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|  * + Property "memory": MemoryRegion defining the physical address space
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|  *   that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
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|  *   devices will be automatically layered on top of this view.)
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|  */
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| typedef struct ARMv7MState {
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|     /*< private >*/
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|     SysBusDevice parent_obj;
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|     /*< public >*/
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|     NVICState nvic;
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|     BitBandState bitband[ARMV7M_NUM_BITBANDS];
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|     ARMCPU *cpu;
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| 
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|     /* MemoryRegion we pass to the CPU, with our devices layered on
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|      * top of the ones the board provides in board_memory.
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|      */
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|     MemoryRegion container;
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| 
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|     /* Properties */
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|     char *cpu_model;
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|     /* MemoryRegion the board provides to us (with its devices, RAM, etc) */
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|     MemoryRegion *board_memory;
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| } ARMv7MState;
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| 
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| #endif
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