007e986ff2
This adds reporting of VMCS shadowing, #VE, IA32_SMBASE, unrestricted VMWRITE and fixes the range of the MSEG revision ID. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
259 lines
8.0 KiB
Python
Executable File
259 lines
8.0 KiB
Python
Executable File
#!/usr/bin/python
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#
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# tool for querying VMX capabilities
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#
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# Copyright 2009-2010 Red Hat, Inc.
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#
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# Authors:
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# Avi Kivity <avi@redhat.com>
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#
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# This work is licensed under the terms of the GNU GPL, version 2. See
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# the COPYING file in the top-level directory.
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MSR_IA32_VMX_BASIC = 0x480
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MSR_IA32_VMX_PINBASED_CTLS = 0x481
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MSR_IA32_VMX_PROCBASED_CTLS = 0x482
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MSR_IA32_VMX_EXIT_CTLS = 0x483
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MSR_IA32_VMX_ENTRY_CTLS = 0x484
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MSR_IA32_VMX_MISC_CTLS = 0x485
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MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
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MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
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MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
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MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
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MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
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MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
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MSR_IA32_VMX_VMFUNC = 0x491
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class msr(object):
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def __init__(self):
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try:
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self.f = open('/dev/cpu/0/msr', 'r', 0)
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except:
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self.f = open('/dev/msr0', 'r', 0)
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def read(self, index, default = None):
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import struct
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self.f.seek(index)
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try:
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return struct.unpack('Q', self.f.read(8))[0]
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except:
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return default
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class Control(object):
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def __init__(self, name, bits, cap_msr, true_cap_msr = None):
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self.name = name
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self.bits = bits
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self.cap_msr = cap_msr
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self.true_cap_msr = true_cap_msr
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def read2(self, nr):
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m = msr()
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val = m.read(nr, 0)
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return (val & 0xffffffff, val >> 32)
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def show(self):
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print self.name
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mbz, mb1 = self.read2(self.cap_msr)
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tmbz, tmb1 = 0, 0
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if self.true_cap_msr:
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tmbz, tmb1 = self.read2(self.true_cap_msr)
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for bit in sorted(self.bits.keys()):
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zero = not (mbz & (1 << bit))
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one = mb1 & (1 << bit)
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true_zero = not (tmbz & (1 << bit))
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true_one = tmb1 & (1 << bit)
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s= '?'
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if (self.true_cap_msr and true_zero and true_one
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and one and not zero):
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s = 'default'
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elif zero and not one:
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s = 'no'
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elif one and not zero:
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s = 'forced'
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elif one and zero:
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s = 'yes'
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print ' %-40s %s' % (self.bits[bit], s)
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class Misc(object):
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def __init__(self, name, bits, msr):
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self.name = name
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self.bits = bits
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self.msr = msr
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def show(self):
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print self.name
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value = msr().read(self.msr, 0)
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def first_bit(key):
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if type(key) is tuple:
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return key[0]
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else:
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return key
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for bits in sorted(self.bits.keys(), key = first_bit):
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if type(bits) is tuple:
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lo, hi = bits
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fmt = int
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else:
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lo = hi = bits
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def fmt(x):
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return { True: 'yes', False: 'no' }[x]
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v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
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print ' %-40s %s' % (self.bits[bits], fmt(v))
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controls = [
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Misc(
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name = 'Basic VMX Information',
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bits = {
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(0, 31): 'Revision',
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(32,44): 'VMCS size',
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48: 'VMCS restricted to 32 bit addresses',
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49: 'Dual-monitor support',
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(50, 53): 'VMCS memory type',
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54: 'INS/OUTS instruction information',
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55: 'IA32_VMX_TRUE_*_CTLS support',
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},
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msr = MSR_IA32_VMX_BASIC,
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),
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Control(
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name = 'pin-based controls',
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bits = {
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0: 'External interrupt exiting',
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3: 'NMI exiting',
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5: 'Virtual NMIs',
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6: 'Activate VMX-preemption timer',
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7: 'Process posted interrupts',
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},
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cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
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),
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Control(
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name = 'primary processor-based controls',
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bits = {
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2: 'Interrupt window exiting',
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3: 'Use TSC offsetting',
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7: 'HLT exiting',
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9: 'INVLPG exiting',
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10: 'MWAIT exiting',
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11: 'RDPMC exiting',
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12: 'RDTSC exiting',
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15: 'CR3-load exiting',
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16: 'CR3-store exiting',
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19: 'CR8-load exiting',
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20: 'CR8-store exiting',
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21: 'Use TPR shadow',
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22: 'NMI-window exiting',
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23: 'MOV-DR exiting',
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24: 'Unconditional I/O exiting',
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25: 'Use I/O bitmaps',
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27: 'Monitor trap flag',
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28: 'Use MSR bitmaps',
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29: 'MONITOR exiting',
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30: 'PAUSE exiting',
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31: 'Activate secondary control',
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},
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cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
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),
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Control(
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name = 'secondary processor-based controls',
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bits = {
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0: 'Virtualize APIC accesses',
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1: 'Enable EPT',
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2: 'Descriptor-table exiting',
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3: 'Enable RDTSCP',
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4: 'Virtualize x2APIC mode',
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5: 'Enable VPID',
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6: 'WBINVD exiting',
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7: 'Unrestricted guest',
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8: 'APIC register emulation',
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9: 'Virtual interrupt delivery',
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10: 'PAUSE-loop exiting',
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11: 'RDRAND exiting',
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12: 'Enable INVPCID',
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13: 'Enable VM functions',
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14: 'VMCS shadowing',
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18: 'EPT-violation #VE'
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},
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cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
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),
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Control(
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name = 'VM-Exit controls',
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bits = {
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2: 'Save debug controls',
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9: 'Host address-space size',
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12: 'Load IA32_PERF_GLOBAL_CTRL',
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15: 'Acknowledge interrupt on exit',
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18: 'Save IA32_PAT',
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19: 'Load IA32_PAT',
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20: 'Save IA32_EFER',
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21: 'Load IA32_EFER',
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22: 'Save VMX-preemption timer value',
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},
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cap_msr = MSR_IA32_VMX_EXIT_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
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),
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Control(
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name = 'VM-Entry controls',
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bits = {
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2: 'Load debug controls',
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9: 'IA-64 mode guest',
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10: 'Entry to SMM',
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11: 'Deactivate dual-monitor treatment',
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13: 'Load IA32_PERF_GLOBAL_CTRL',
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14: 'Load IA32_PAT',
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15: 'Load IA32_EFER',
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},
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cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
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),
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Misc(
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name = 'Miscellaneous data',
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bits = {
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(0,4): 'VMX-preemption timer scale (log2)',
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5: 'Store EFER.LMA into IA-32e mode guest control',
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6: 'HLT activity state',
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7: 'Shutdown activity state',
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8: 'Wait-for-SIPI activity state',
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15: 'IA32_SMBASE support',
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(16,24): 'Number of CR3-target values',
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(25,27): 'MSR-load/store count recommenation',
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28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
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29: 'VMWRITE to VM-exit information fields',
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(32,63): 'MSEG revision identifier',
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},
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msr = MSR_IA32_VMX_MISC_CTLS,
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),
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Misc(
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name = 'VPID and EPT capabilities',
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bits = {
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0: 'Execute-only EPT translations',
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6: 'Page-walk length 4',
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8: 'Paging-structure memory type UC',
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14: 'Paging-structure memory type WB',
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16: '2MB EPT pages',
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17: '1GB EPT pages',
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20: 'INVEPT supported',
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21: 'EPT accessed and dirty flags',
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25: 'Single-context INVEPT',
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26: 'All-context INVEPT',
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32: 'INVVPID supported',
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40: 'Individual-address INVVPID',
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41: 'Single-context INVVPID',
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42: 'All-context INVVPID',
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43: 'Single-context-retaining-globals INVVPID',
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},
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msr = MSR_IA32_VMX_EPT_VPID_CAP,
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),
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Misc(
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name = 'VM Functions',
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bits = {
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0: 'EPTP Switching',
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},
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msr = MSR_IA32_VMX_VMFUNC,
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),
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]
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for c in controls:
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c.show()
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