7d8406be69
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1946 c046a42c-6fe2-441c-8c8c-71466251a162
905 lines
25 KiB
C
905 lines
25 KiB
C
/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h"
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin"
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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#define LINUX_BOOT_FILENAME "linux_boot.bin"
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#define KERNEL_LOAD_ADDR 0x00100000
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#define INITRD_LOAD_ADDR 0x00600000
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#define KERNEL_PARAMS_ADDR 0x00090000
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#define KERNEL_CMDLINE_ADDR 0x00099000
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
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}
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/* MSDOS compatibility mode FPU exception support */
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{
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pic_set_irq(13, 1);
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}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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{
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pic_set_irq(13, 0);
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}
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env)
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{
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return qemu_get_clock(vm_clock);
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}
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{
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int intno;
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intno = apic_get_interrupt(env);
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if (intno >= 0) {
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/* set irq request if a PIC irq is still pending */
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/* XXX: improve that */
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pic_update_irq(isa_pic);
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return intno;
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}
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/* read the irq from the PIC */
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intno = pic_read_irq(isa_pic);
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return intno;
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}
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static void pic_irq_request(void *opaque, int level)
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{
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CPUState *env = opaque;
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if (level)
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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else
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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/* PC cmos mappings */
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#define REG_EQUIPMENT_BYTE 0x14
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#define REG_IBM_CENTURY_BYTE 0x32
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#define REG_IBM_PS2_CENTURY_BYTE 0x37
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static inline int to_bcd(RTCState *s, int a)
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{
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return ((a / 10) << 4) | (a % 10);
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}
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static int cmos_get_fd_drive_type(int fd0)
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{
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int val;
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switch (fd0) {
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case 0:
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/* 1.44 Mb 3"5 drive */
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val = 4;
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break;
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case 1:
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/* 2.88 Mb 3"5 drive */
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val = 5;
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break;
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case 2:
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/* 1.2 Mb 5"5 drive */
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val = 2;
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break;
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default:
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val = 0;
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break;
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}
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return val;
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}
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
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RTCState *s = rtc_state;
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int cylinders, heads, sectors;
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bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors);
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rtc_set_memory(s, type_ofs, 47);
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rtc_set_memory(s, info_ofs, cylinders);
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rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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rtc_set_memory(s, info_ofs + 2, heads);
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rtc_set_memory(s, info_ofs + 3, 0xff);
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rtc_set_memory(s, info_ofs + 4, 0xff);
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rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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rtc_set_memory(s, info_ofs + 6, cylinders);
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rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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rtc_set_memory(s, info_ofs + 8, sectors);
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}
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/* hd_table must contain 4 block drivers */
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static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
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{
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RTCState *s = rtc_state;
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int val;
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int fd0, fd1, nb;
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time_t ti;
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struct tm *tm;
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int i;
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/* set the CMOS date */
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time(&ti);
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if (rtc_utc)
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tm = gmtime(&ti);
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else
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tm = localtime(&ti);
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rtc_set_date(s, tm);
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val = to_bcd(s, (tm->tm_year / 100) + 19);
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rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
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rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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val = 640; /* base memory in K */
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x16, val >> 8);
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val = (ram_size / 1024) - 1024;
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if (val > 65535)
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val = 65535;
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8);
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8);
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if (ram_size > (16 * 1024 * 1024))
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
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else
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val = 0;
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if (val > 65535)
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8);
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switch(boot_device) {
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case 'a':
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case 'b':
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rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
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break;
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default:
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case 'c':
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rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
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break;
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case 'd':
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rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
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break;
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}
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/* floppy type */
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3)
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nb++;
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if (fd1 < 3)
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nb++;
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switch (nb) {
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case 0:
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break;
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case 1:
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val |= 0x01; /* 1 drive, ready for boot */
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break;
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case 2:
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val |= 0x41; /* 2 drives, ready for boot */
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break;
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}
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val |= 0x02; /* FPU is there */
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val |= 0x04; /* PS/2 mouse installed */
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
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/* hard drives */
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rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
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if (hd_table[0])
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cmos_init_hd(0x19, 0x1b, hd_table[0]);
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if (hd_table[1])
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cmos_init_hd(0x1a, 0x24, hd_table[1]);
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val = 0;
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for (i = 0; i < 4; i++) {
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if (hd_table[i]) {
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int cylinders, heads, sectors, translation;
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/* NOTE: bdrv_get_geometry_hint() returns the physical
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geometry. It is always such that: 1 <= sects <= 63, 1
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<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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geometry can be different if a translation is done. */
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translation = bdrv_get_translation_hint(hd_table[i]);
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if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors);
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if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
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/* No translation. */
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translation = 0;
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} else {
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/* LBA translation. */
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translation = 1;
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}
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} else {
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translation--;
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}
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val |= translation << (i * 2);
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}
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}
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rtc_set_memory(s, 0x39, val);
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/* Disable check of 0x55AA signature on the last two bytes of
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first sector of disk. XXX: make it the default ? */
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// rtc_set_memory(s, 0x38, 1);
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}
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void ioport_set_a20(int enable)
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{
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/* XXX: send to all CPUs ? */
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cpu_x86_set_a20(first_cpu, enable);
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}
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int ioport_get_a20(void)
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{
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return ((first_cpu->a20_mask >> 20) & 1);
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}
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
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{
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ioport_set_a20((val >> 1) & 1);
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/* XXX: bit 0 is fast reset */
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}
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static uint32_t ioport92_read(void *opaque, uint32_t addr)
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{
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return ioport_get_a20() << 1;
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}
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/***********************************************************/
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/* Bochs BIOS debug ports */
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void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
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{
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static const char shutdown_str[8] = "Shutdown";
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static int shutdown_index = 0;
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switch(addr) {
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/* Bochs BIOS messages */
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case 0x400:
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case 0x401:
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fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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exit(1);
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case 0x402:
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case 0x403:
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#ifdef DEBUG_BIOS
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fprintf(stderr, "%c", val);
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#endif
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break;
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case 0x8900:
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/* same as Bochs power off */
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if (val == shutdown_str[shutdown_index]) {
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shutdown_index++;
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if (shutdown_index == 8) {
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shutdown_index = 0;
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qemu_system_shutdown_request();
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}
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} else {
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shutdown_index = 0;
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}
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break;
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/* LGPL'ed VGA BIOS messages */
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case 0x501:
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case 0x502:
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fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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exit(1);
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case 0x500:
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case 0x503:
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#ifdef DEBUG_BIOS
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fprintf(stderr, "%c", val);
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#endif
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break;
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}
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}
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void bochs_bios_init(void)
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{
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register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
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register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
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register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
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register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
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register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
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}
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int load_kernel(const char *filename, uint8_t *addr,
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uint8_t *real_addr)
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{
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int fd, size;
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int setup_sects;
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fd = open(filename, O_RDONLY | O_BINARY);
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if (fd < 0)
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return -1;
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/* load 16 bit code */
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if (read(fd, real_addr, 512) != 512)
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goto fail;
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setup_sects = real_addr[0x1F1];
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if (!setup_sects)
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setup_sects = 4;
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if (read(fd, real_addr + 512, setup_sects * 512) !=
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setup_sects * 512)
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goto fail;
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/* load 32 bit code */
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size = read(fd, addr, 16 * 1024 * 1024);
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if (size < 0)
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goto fail;
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close(fd);
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return size;
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fail:
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close(fd);
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return -1;
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}
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static void main_cpu_reset(void *opaque)
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{
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CPUState *env = opaque;
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cpu_reset(env);
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}
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/*************************************************/
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static void putb(uint8_t **pp, int val)
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{
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uint8_t *q;
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q = *pp;
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*q++ = val;
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*pp = q;
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}
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static void putstr(uint8_t **pp, const char *str)
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{
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uint8_t *q;
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q = *pp;
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while (*str)
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*q++ = *str++;
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*pp = q;
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}
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static void putle16(uint8_t **pp, int val)
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{
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uint8_t *q;
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q = *pp;
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*q++ = val;
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*q++ = val >> 8;
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*pp = q;
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}
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static void putle32(uint8_t **pp, int val)
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{
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uint8_t *q;
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q = *pp;
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*q++ = val;
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*q++ = val >> 8;
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*q++ = val >> 16;
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*q++ = val >> 24;
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*pp = q;
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}
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static int mpf_checksum(const uint8_t *data, int len)
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{
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int sum, i;
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sum = 0;
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for(i = 0; i < len; i++)
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sum += data[i];
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return sum & 0xff;
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}
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/* Build the Multi Processor table in the BIOS. Same values as Bochs. */
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static void bios_add_mptable(uint8_t *bios_data)
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{
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uint8_t *mp_config_table, *q, *float_pointer_struct;
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int ioapic_id, offset, i, len;
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if (smp_cpus <= 1)
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return;
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mp_config_table = bios_data + 0xb000;
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q = mp_config_table;
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putstr(&q, "PCMP"); /* "PCMP signature */
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putle16(&q, 0); /* table length (patched later) */
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putb(&q, 4); /* spec rev */
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putb(&q, 0); /* checksum (patched later) */
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putstr(&q, "QEMUCPU "); /* OEM id */
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putstr(&q, "0.1 "); /* vendor id */
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putle32(&q, 0); /* OEM table ptr */
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putle16(&q, 0); /* OEM table size */
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putle16(&q, 20); /* entry count */
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putle32(&q, 0xfee00000); /* local APIC addr */
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putle16(&q, 0); /* ext table length */
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putb(&q, 0); /* ext table checksum */
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putb(&q, 0); /* reserved */
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for(i = 0; i < smp_cpus; i++) {
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putb(&q, 0); /* entry type = processor */
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putb(&q, i); /* APIC id */
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putb(&q, 0x11); /* local APIC version number */
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if (i == 0)
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putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
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else
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putb(&q, 1); /* cpu flags: enabled */
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putb(&q, 0); /* cpu signature */
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putb(&q, 6);
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putb(&q, 0);
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putb(&q, 0);
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putle16(&q, 0x201); /* feature flags */
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putle16(&q, 0);
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putle16(&q, 0); /* reserved */
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putle16(&q, 0);
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putle16(&q, 0);
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putle16(&q, 0);
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}
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/* isa bus */
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putb(&q, 1); /* entry type = bus */
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putb(&q, 0); /* bus ID */
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putstr(&q, "ISA ");
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/* ioapic */
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ioapic_id = smp_cpus;
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putb(&q, 2); /* entry type = I/O APIC */
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putb(&q, ioapic_id); /* apic ID */
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putb(&q, 0x11); /* I/O APIC version number */
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putb(&q, 1); /* enable */
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putle32(&q, 0xfec00000); /* I/O APIC addr */
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|
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/* irqs */
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for(i = 0; i < 16; i++) {
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putb(&q, 3); /* entry type = I/O interrupt */
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putb(&q, 0); /* interrupt type = vectored interrupt */
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putb(&q, 0); /* flags: po=0, el=0 */
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putb(&q, 0);
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putb(&q, 0); /* source bus ID = ISA */
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putb(&q, i); /* source bus IRQ */
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putb(&q, ioapic_id); /* dest I/O APIC ID */
|
|
putb(&q, i); /* dest I/O APIC interrupt in */
|
|
}
|
|
/* patch length */
|
|
len = q - mp_config_table;
|
|
mp_config_table[4] = len;
|
|
mp_config_table[5] = len >> 8;
|
|
|
|
mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
|
|
|
|
/* align to 16 */
|
|
offset = q - bios_data;
|
|
offset = (offset + 15) & ~15;
|
|
float_pointer_struct = bios_data + offset;
|
|
|
|
/* floating pointer structure */
|
|
q = float_pointer_struct;
|
|
putstr(&q, "_MP_");
|
|
/* pointer to MP config table */
|
|
putle32(&q, mp_config_table - bios_data + 0x000f0000);
|
|
|
|
putb(&q, 1); /* length in 16 byte units */
|
|
putb(&q, 4); /* MP spec revision */
|
|
putb(&q, 0); /* checksum (patched later) */
|
|
putb(&q, 0); /* MP feature byte 1 */
|
|
|
|
putb(&q, 0);
|
|
putb(&q, 0);
|
|
putb(&q, 0);
|
|
putb(&q, 0);
|
|
float_pointer_struct[10] =
|
|
-mpf_checksum(float_pointer_struct, q - float_pointer_struct);
|
|
}
|
|
|
|
|
|
static const int ide_iobase[2] = { 0x1f0, 0x170 };
|
|
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
|
|
static const int ide_irq[2] = { 14, 15 };
|
|
|
|
#define NE2000_NB_MAX 6
|
|
|
|
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
|
|
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
|
|
|
|
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
|
|
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
|
|
|
|
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
|
|
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
|
|
|
|
#ifdef HAS_AUDIO
|
|
static void audio_init (PCIBus *pci_bus)
|
|
{
|
|
struct soundhw *c;
|
|
int audio_enabled = 0;
|
|
|
|
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
|
audio_enabled = c->enabled;
|
|
}
|
|
|
|
if (audio_enabled) {
|
|
AudioState *s;
|
|
|
|
s = AUD_init ();
|
|
if (s) {
|
|
for (c = soundhw; c->name; ++c) {
|
|
if (c->enabled) {
|
|
if (c->isa) {
|
|
c->init.init_isa (s);
|
|
}
|
|
else {
|
|
if (pci_bus) {
|
|
c->init.init_pci (pci_bus, s);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
static void pc_init_ne2k_isa(NICInfo *nd)
|
|
{
|
|
static int nb_ne2k = 0;
|
|
|
|
if (nb_ne2k == NE2000_NB_MAX)
|
|
return;
|
|
isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
|
|
nb_ne2k++;
|
|
}
|
|
|
|
/* PC hardware initialisation */
|
|
static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
const char *initrd_filename,
|
|
int pci_enabled)
|
|
{
|
|
char buf[1024];
|
|
int ret, linux_boot, initrd_size, i;
|
|
unsigned long bios_offset, vga_bios_offset;
|
|
int bios_size, isa_bios_size;
|
|
PCIBus *pci_bus;
|
|
int piix3_devfn = -1;
|
|
CPUState *env;
|
|
NICInfo *nd;
|
|
|
|
linux_boot = (kernel_filename != NULL);
|
|
|
|
/* init CPUs */
|
|
for(i = 0; i < smp_cpus; i++) {
|
|
env = cpu_init();
|
|
if (i != 0)
|
|
env->hflags |= HF_HALTED_MASK;
|
|
if (smp_cpus > 1) {
|
|
/* XXX: enable it in all cases */
|
|
env->cpuid_features |= CPUID_APIC;
|
|
}
|
|
register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
|
|
qemu_register_reset(main_cpu_reset, env);
|
|
if (pci_enabled) {
|
|
apic_init(env);
|
|
}
|
|
}
|
|
|
|
/* allocate RAM */
|
|
cpu_register_physical_memory(0, ram_size, 0);
|
|
|
|
/* BIOS load */
|
|
bios_offset = ram_size + vga_ram_size;
|
|
vga_bios_offset = bios_offset + 256 * 1024;
|
|
|
|
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
|
|
bios_size = get_image_size(buf);
|
|
if (bios_size <= 0 ||
|
|
(bios_size % 65536) != 0 ||
|
|
bios_size > (256 * 1024)) {
|
|
goto bios_error;
|
|
}
|
|
ret = load_image(buf, phys_ram_base + bios_offset);
|
|
if (ret != bios_size) {
|
|
bios_error:
|
|
fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
|
|
exit(1);
|
|
}
|
|
if (bios_size == 65536) {
|
|
bios_add_mptable(phys_ram_base + bios_offset);
|
|
}
|
|
|
|
/* VGA BIOS load */
|
|
if (cirrus_vga_enabled) {
|
|
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
|
|
} else {
|
|
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
|
|
}
|
|
ret = load_image(buf, phys_ram_base + vga_bios_offset);
|
|
|
|
/* setup basic memory access */
|
|
cpu_register_physical_memory(0xc0000, 0x10000,
|
|
vga_bios_offset | IO_MEM_ROM);
|
|
|
|
/* map the last 128KB of the BIOS in ISA space */
|
|
isa_bios_size = bios_size;
|
|
if (isa_bios_size > (128 * 1024))
|
|
isa_bios_size = 128 * 1024;
|
|
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
|
|
IO_MEM_UNASSIGNED);
|
|
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
|
isa_bios_size,
|
|
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
|
|
/* map all the bios at the top of memory */
|
|
cpu_register_physical_memory((uint32_t)(-bios_size),
|
|
bios_size, bios_offset | IO_MEM_ROM);
|
|
|
|
bochs_bios_init();
|
|
|
|
if (linux_boot) {
|
|
uint8_t bootsect[512];
|
|
uint8_t old_bootsect[512];
|
|
|
|
if (bs_table[0] == NULL) {
|
|
fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
|
exit(1);
|
|
}
|
|
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
|
|
ret = load_image(buf, bootsect);
|
|
if (ret != sizeof(bootsect)) {
|
|
fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
|
buf);
|
|
exit(1);
|
|
}
|
|
|
|
if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
|
|
/* copy the MSDOS partition table */
|
|
memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
|
|
}
|
|
|
|
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
|
|
|
|
/* now we can load the kernel */
|
|
ret = load_kernel(kernel_filename,
|
|
phys_ram_base + KERNEL_LOAD_ADDR,
|
|
phys_ram_base + KERNEL_PARAMS_ADDR);
|
|
if (ret < 0) {
|
|
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
|
kernel_filename);
|
|
exit(1);
|
|
}
|
|
|
|
/* load initrd */
|
|
initrd_size = 0;
|
|
if (initrd_filename) {
|
|
initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
|
|
if (initrd_size < 0) {
|
|
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
|
initrd_filename);
|
|
exit(1);
|
|
}
|
|
}
|
|
if (initrd_size > 0) {
|
|
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
|
|
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
|
}
|
|
pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
|
kernel_cmdline);
|
|
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
|
|
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
|
KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
|
|
/* loader type */
|
|
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
|
|
}
|
|
|
|
if (pci_enabled) {
|
|
pci_bus = i440fx_init();
|
|
piix3_devfn = piix3_init(pci_bus);
|
|
} else {
|
|
pci_bus = NULL;
|
|
}
|
|
|
|
/* init basic PC hardware */
|
|
register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
|
|
|
|
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
|
|
|
|
if (cirrus_vga_enabled) {
|
|
if (pci_enabled) {
|
|
pci_cirrus_vga_init(pci_bus,
|
|
ds, phys_ram_base + ram_size, ram_size,
|
|
vga_ram_size);
|
|
} else {
|
|
isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
|
|
vga_ram_size);
|
|
}
|
|
} else {
|
|
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
|
|
vga_ram_size, 0, 0);
|
|
}
|
|
|
|
rtc_state = rtc_init(0x70, 8);
|
|
|
|
register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
|
|
register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
|
|
|
|
if (pci_enabled) {
|
|
ioapic = ioapic_init();
|
|
}
|
|
isa_pic = pic_init(pic_irq_request, first_cpu);
|
|
pit = pit_init(0x40, 0);
|
|
pcspk_init(pit);
|
|
if (pci_enabled) {
|
|
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
|
|
}
|
|
|
|
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
|
|
if (serial_hds[i]) {
|
|
serial_init(&pic_set_irq_new, isa_pic,
|
|
serial_io[i], serial_irq[i], serial_hds[i]);
|
|
}
|
|
}
|
|
|
|
for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
|
|
if (parallel_hds[i]) {
|
|
parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
|
|
}
|
|
}
|
|
|
|
for(i = 0; i < nb_nics; i++) {
|
|
nd = &nd_table[i];
|
|
if (!nd->model) {
|
|
if (pci_enabled) {
|
|
nd->model = "ne2k_pci";
|
|
} else {
|
|
nd->model = "ne2k_isa";
|
|
}
|
|
}
|
|
if (strcmp(nd->model, "ne2k_isa") == 0) {
|
|
pc_init_ne2k_isa(nd);
|
|
} else if (pci_enabled) {
|
|
pci_nic_init(pci_bus, nd);
|
|
} else {
|
|
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
|
exit(1);
|
|
}
|
|
}
|
|
|
|
if (pci_enabled) {
|
|
pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
|
|
} else {
|
|
for(i = 0; i < 2; i++) {
|
|
isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
|
|
bs_table[2 * i], bs_table[2 * i + 1]);
|
|
}
|
|
}
|
|
|
|
kbd_init();
|
|
DMA_init(0);
|
|
#ifdef HAS_AUDIO
|
|
audio_init(pci_enabled ? pci_bus : NULL);
|
|
#endif
|
|
|
|
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
|
|
|
|
cmos_init(ram_size, boot_device, bs_table);
|
|
|
|
if (pci_enabled && usb_enabled) {
|
|
usb_uhci_init(pci_bus, piix3_devfn + 2);
|
|
}
|
|
|
|
if (pci_enabled && acpi_enabled) {
|
|
piix4_pm_init(pci_bus, piix3_devfn + 3);
|
|
}
|
|
|
|
#if 0
|
|
/* ??? Need to figure out some way for the user to
|
|
specify SCSI devices. */
|
|
if (pci_enabled) {
|
|
void *scsi;
|
|
BlockDriverState *bdrv;
|
|
|
|
scsi = lsi_scsi_init(pci_bus, -1);
|
|
bdrv = bdrv_new("scsidisk");
|
|
bdrv_open(bdrv, "scsi_disk.img", 0);
|
|
lsi_scsi_attach(scsi, bdrv, -1);
|
|
bdrv = bdrv_new("scsicd");
|
|
bdrv_open(bdrv, "scsi_cd.iso", 0);
|
|
bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
|
lsi_scsi_attach(scsi, bdrv, -1);
|
|
}
|
|
#endif
|
|
/* must be done after all PCI devices are instanciated */
|
|
/* XXX: should be done in the Bochs BIOS */
|
|
if (pci_enabled) {
|
|
pci_bios_init();
|
|
if (acpi_enabled)
|
|
acpi_bios_init();
|
|
}
|
|
}
|
|
|
|
static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
|
|
DisplayState *ds, const char **fd_filename,
|
|
int snapshot,
|
|
const char *kernel_filename,
|
|
const char *kernel_cmdline,
|
|
const char *initrd_filename)
|
|
{
|
|
pc_init1(ram_size, vga_ram_size, boot_device,
|
|
ds, fd_filename, snapshot,
|
|
kernel_filename, kernel_cmdline,
|
|
initrd_filename, 1);
|
|
}
|
|
|
|
static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
|
|
DisplayState *ds, const char **fd_filename,
|
|
int snapshot,
|
|
const char *kernel_filename,
|
|
const char *kernel_cmdline,
|
|
const char *initrd_filename)
|
|
{
|
|
pc_init1(ram_size, vga_ram_size, boot_device,
|
|
ds, fd_filename, snapshot,
|
|
kernel_filename, kernel_cmdline,
|
|
initrd_filename, 0);
|
|
}
|
|
|
|
QEMUMachine pc_machine = {
|
|
"pc",
|
|
"Standard PC",
|
|
pc_init_pci,
|
|
};
|
|
|
|
QEMUMachine isapc_machine = {
|
|
"isapc",
|
|
"ISA-only PC",
|
|
pc_init_isa,
|
|
};
|