ths 34ee2edebb One more bit of mips CPU configuration, and support for early 4KEc ...

which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162

2007-03-24 23:36:18 +00:00

..

cpu.h

Fix enough FPU/R2 support to get 24Kf going.

2007-03-23 00:43:28 +00:00

exec.h

Fix enough FPU/R2 support to get 24Kf going.

2007-03-23 00:43:28 +00:00

fop_template.c

Preliminiary MIPS64 support, disabled by default due to performance impact.

2006-12-21 01:19:56 +00:00

helper.c

Fix BD flag handling, cause register contents, implement some more bits

2007-03-18 12:43:40 +00:00

mips-defs.h

Move mips CPU specific initialization to translate_init.c.

2007-03-21 11:04:42 +00:00

op_helper_mem.c

Replace TLSZ with TARGET_FMT_lx.

2007-02-20 23:37:21 +00:00

op_helper.c

Fix enough FPU/R2 support to get 24Kf going.

2007-03-23 00:43:28 +00:00

op_mem.c

MIPS FPU dynamic activation, part 1, by Herve Poussineau.

2007-02-28 22:37:42 +00:00

op_template.c

Preliminiary MIPS64 support, disabled by default due to performance impact.

2006-12-21 01:19:56 +00:00

op.c

Fix enough FPU/R2 support to get 24Kf going.

2007-03-23 00:43:28 +00:00

TODO

Note FPU enable/disable issue.

2007-03-17 15:39:48 +00:00

translate_init.c

One more bit of mips CPU configuration, and support for early 4KEc

2007-03-24 23:36:18 +00:00

translate.c

Fix enough FPU/R2 support to get 24Kf going.

2007-03-23 00:43:28 +00:00