c4efe1cada
This includes basic PCI support for the PC platform. Enough abstraction should be present to support non-PC platforms too. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1366123521-4330-3-git-send-email-aliguori@us.ibm.com
152 lines
3.3 KiB
C
152 lines
3.3 KiB
C
/*
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* libqos PCI bindings
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*
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* Copyright IBM, Corp. 2012-2013
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "libqos/pci.h"
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#include "hw/pci/pci_regs.h"
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#include <glib.h>
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#include <stdio.h>
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void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
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void (*func)(QPCIDevice *dev, int devfn, void *data),
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void *data)
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{
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int slot;
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for (slot = 0; slot < 32; slot++) {
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int fn;
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for (fn = 0; fn < 8; fn++) {
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QPCIDevice *dev;
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dev = qpci_device_find(bus, QPCI_DEVFN(slot, fn));
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if (!dev) {
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continue;
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}
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if (vendor_id != -1 &&
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qpci_config_readw(dev, PCI_VENDOR_ID) != vendor_id) {
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continue;
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}
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if (device_id != -1 &&
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qpci_config_readw(dev, PCI_DEVICE_ID) != device_id) {
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continue;
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}
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func(dev, QPCI_DEVFN(slot, fn), data);
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}
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}
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}
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QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
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{
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QPCIDevice *dev;
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dev = g_malloc0(sizeof(*dev));
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dev->bus = bus;
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dev->devfn = devfn;
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if (qpci_config_readw(dev, PCI_VENDOR_ID) == 0xFFFF) {
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g_free(dev);
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return NULL;
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}
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return dev;
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}
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void qpci_device_enable(QPCIDevice *dev)
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{
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uint16_t cmd;
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/* FIXME -- does this need to be a bus callout? */
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cmd = qpci_config_readw(dev, PCI_COMMAND);
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cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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qpci_config_writew(dev, PCI_COMMAND, cmd);
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}
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uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset)
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{
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return dev->bus->config_readb(dev->bus, dev->devfn, offset);
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}
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uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset)
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{
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return dev->bus->config_readw(dev->bus, dev->devfn, offset);
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}
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uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset)
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{
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return dev->bus->config_readl(dev->bus, dev->devfn, offset);
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}
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void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value)
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{
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dev->bus->config_writeb(dev->bus, dev->devfn, offset, value);
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}
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void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value)
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{
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dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
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}
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void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value)
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{
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dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
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}
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uint8_t qpci_io_readb(QPCIDevice *dev, void *data)
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{
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return dev->bus->io_readb(dev->bus, data);
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}
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uint16_t qpci_io_readw(QPCIDevice *dev, void *data)
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{
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return dev->bus->io_readw(dev->bus, data);
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}
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uint32_t qpci_io_readl(QPCIDevice *dev, void *data)
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{
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return dev->bus->io_readl(dev->bus, data);
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}
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void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value)
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{
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dev->bus->io_writeb(dev->bus, data, value);
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}
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void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value)
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{
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dev->bus->io_writew(dev->bus, data, value);
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}
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void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value)
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{
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dev->bus->io_writel(dev->bus, data, value);
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}
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void *qpci_iomap(QPCIDevice *dev, int barno)
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{
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return dev->bus->iomap(dev->bus, dev, barno);
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}
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void qpci_iounmap(QPCIDevice *dev, void *data)
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{
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dev->bus->iounmap(dev->bus, data);
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}
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