 aef445bd7e
			
		
	
	
		aef445bd7e
		
	
	
	
	
		
			
			git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2159 c046a42c-6fe2-441c-8c8c-71466251a162
		
			
				
	
	
		
			103 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			103 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Memory mapped access to ISA IO space.
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|  *
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|  * Copyright (c) 2006 Fabrice Bellard
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|  * 
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  */
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| 
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| #include "vl.h"
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| 
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| static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
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|                                   uint32_t val)
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| {
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|     cpu_outb(NULL, addr & 0xffff, val);
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| }
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| 
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| static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
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|                                   uint32_t val)
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| {
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| #ifdef TARGET_WORDS_BIGENDIAN
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|     val = bswap16(val);
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| #endif
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|     cpu_outw(NULL, addr & 0xffff, val);
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| }
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| 
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| static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
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|                                 uint32_t val)
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| {
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| #ifdef TARGET_WORDS_BIGENDIAN
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|     val = bswap32(val);
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| #endif
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|     cpu_outl(NULL, addr & 0xffff, val);
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| }
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| 
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| static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
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| {
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|     uint32_t val;
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| 
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|     val = cpu_inb(NULL, addr & 0xffff);
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|     return val;
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| }
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| 
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| static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr)
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| {
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|     uint32_t val;
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| 
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|     val = cpu_inw(NULL, addr & 0xffff);
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| #ifdef TARGET_WORDS_BIGENDIAN
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|     val = bswap16(val);
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| #endif
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|     return val;
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| }
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| 
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| static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
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| {
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|     uint32_t val;
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| 
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|     val = cpu_inl(NULL, addr & 0xffff);
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| #ifdef TARGET_WORDS_BIGENDIAN
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|     val = bswap32(val);
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| #endif
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|     return val;
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| }
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| 
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| static CPUWriteMemoryFunc *isa_mmio_write[] = {
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|     &isa_mmio_writeb,
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|     &isa_mmio_writew,
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|     &isa_mmio_writel,
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| };
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| 
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| static CPUReadMemoryFunc *isa_mmio_read[] = {
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|     &isa_mmio_readb,
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|     &isa_mmio_readw,
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|     &isa_mmio_readl,
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| };
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| 
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| static int isa_mmio_iomemtype = 0;
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| 
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| void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
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| {
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|     if (!isa_mmio_iomemtype) {
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|         isa_mmio_iomemtype = cpu_register_io_memory(0, isa_mmio_read,
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|                                                     isa_mmio_write, NULL);
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|     }
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|     cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
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| }
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