Aurelien Jarno c0f809c46a target-sh4: implement writes to mmaped ITLB
Some Linux kernels seems to implement ITLB/UTLB flushing through by
writing all TLB entries through the memory mapped interface instead
of writing one to MMUCR.TI.

Implement memory mapped ITLB write interface so that such kernels can
boot. This fixes https://bugs.launchpad.net/bugs/700774 .

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Read the documentation in qemu-doc.html.

Fabrice Bellard.
Description
A fork of QEMU-Nyx which is better suited for my bachelors thesis
Readme 154 MiB
Languages
C 90.3%
Dylan 2.5%
Python 2.1%
C++ 2%
Shell 1.7%
Other 1.4%