4ce6243dc6
Linux manages to have three separate orderings of the arguments to the clone() syscall on different architectures. In the kernel these are selected via CONFIG_CLONE_BACKWARDS and CONFIG_CLONE_BACKWARDS2. Clean up our implementation of this to use similar #define names rather than a TARGET_* ifdef ladder. This includes behaviour changes fixing bugs on cris, x86-64, m68k, openrisc and unicore32. cris had explicit but wrong handling; the others were just incorrectly using QEMU's default, which happened to be the equivalent of CONFIG_CLONE_BACKWARDS. (unicore32 appears to be broken in the mainline kernel in that it tries to use arg3 for both parent_tidptr and newtls simultaneously -- we don't attempt to emulate this bug...) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
45 lines
1022 B
C
45 lines
1022 B
C
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/* this struct defines the way the registers are stored on the
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stack during a system call. */
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struct target_pt_regs {
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abi_long uregs[18];
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};
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#define ARM_cpsr uregs[16]
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#define ARM_pc uregs[15]
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#define ARM_lr uregs[14]
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#define ARM_sp uregs[13]
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#define ARM_ip uregs[12]
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#define ARM_fp uregs[11]
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#define ARM_r10 uregs[10]
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#define ARM_r9 uregs[9]
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#define ARM_r8 uregs[8]
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#define ARM_r7 uregs[7]
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#define ARM_r6 uregs[6]
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#define ARM_r5 uregs[5]
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#define ARM_r4 uregs[4]
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#define ARM_r3 uregs[3]
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#define ARM_r2 uregs[2]
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#define ARM_r1 uregs[1]
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#define ARM_r0 uregs[0]
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#define ARM_ORIG_r0 uregs[17]
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#define ARM_SYSCALL_BASE 0x900000
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#define ARM_THUMB_SYSCALL 0
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#define ARM_NR_BASE 0xf0000
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#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
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#define ARM_NR_set_tls (ARM_NR_BASE + 5)
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#define ARM_NR_semihosting 0x123456
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#define ARM_NR_thumb_semihosting 0xAB
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#if defined(TARGET_WORDS_BIGENDIAN)
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#define UNAME_MACHINE "armv5teb"
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#else
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#define UNAME_MACHINE "armv5tel"
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#endif
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#define TARGET_CLONE_BACKWARDS
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