00b941e581
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().
Prepares for changing cpu_memory_rw_debug() argument to CPUState.
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
164 lines
4.2 KiB
C
164 lines
4.2 KiB
C
/*
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* Moxie emulation
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*
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* Copyright (c) 2008, 2010, 2013 Anthony Green
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CPU_MOXIE_H
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#define _CPU_MOXIE_H
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#include "config.h"
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#include "qemu-common.h"
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#define TARGET_LONG_BITS 32
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#define CPUArchState struct CPUMoxieState
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#define TARGET_HAS_ICE 1
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#define ELF_MACHINE 0xFEED /* EM_MOXIE */
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#define MOXIE_EX_DIV0 0
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#define MOXIE_EX_BAD 1
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#define MOXIE_EX_IRQ 2
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#define MOXIE_EX_SWI 3
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#define MOXIE_EX_MMU_MISS 4
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#define MOXIE_EX_BREAK 16
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#include "exec/cpu-defs.h"
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#include "fpu/softfloat.h"
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#define TARGET_PAGE_BITS 12 /* 4k */
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#define NB_MMU_MODES 1
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typedef struct CPUMoxieState {
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uint32_t flags; /* general execution flags */
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uint32_t gregs[16]; /* general registers */
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uint32_t sregs[256]; /* special registers */
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uint32_t pc; /* program counter */
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/* Instead of saving the cc value, we save the cmp arguments
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and compute cc on demand. */
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uint32_t cc_a; /* reg a for condition code calculation */
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uint32_t cc_b; /* reg b for condition code calculation */
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void *irq[8];
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CPU_COMMON
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} CPUMoxieState;
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#include "qom/cpu.h"
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#define TYPE_MOXIE_CPU "moxie-cpu"
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#define MOXIE_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
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#define MOXIE_CPU(obj) \
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OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
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#define MOXIE_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
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/**
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* MoxieCPUClass:
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* @parent_reset: The parent class' reset handler.
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*
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* A Moxie CPU model.
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*/
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typedef struct MoxieCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} MoxieCPUClass;
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/**
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* MoxieCPU:
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* @env: #CPUMoxieState
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*
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* A Moxie CPU.
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*/
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typedef struct MoxieCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUMoxieState env;
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} MoxieCPU;
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static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
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{
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return container_of(env, MoxieCPU, env);
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}
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#define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
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#define ENV_OFFSET offsetof(MoxieCPU, env)
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MoxieCPU *cpu_moxie_init(const char *cpu_model);
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int cpu_moxie_exec(CPUMoxieState *s);
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void moxie_cpu_do_interrupt(CPUState *cs);
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void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
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fprintf_function cpu_fprintf, int flags);
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hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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void moxie_translate_init(void);
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int cpu_moxie_signal_handler(int host_signum, void *pinfo,
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void *puc);
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static inline CPUMoxieState *cpu_init(const char *cpu_model)
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{
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MoxieCPU *cpu = cpu_moxie_init(cpu_model);
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if (cpu == NULL) {
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return NULL;
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}
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return &cpu->env;
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}
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#define cpu_exec cpu_moxie_exec
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#define cpu_gen_code cpu_moxie_gen_code
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#define cpu_signal_handler cpu_moxie_signal_handler
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static inline int cpu_mmu_index(CPUMoxieState *env)
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{
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return 0;
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}
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#include "exec/cpu-all.h"
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#include "exec/exec-all.h"
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static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
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target_ulong *cs_base, int *flags)
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{
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*pc = env->pc;
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*cs_base = 0;
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*flags = 0;
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}
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static inline int cpu_has_work(CPUState *cpu)
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{
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return cpu->interrupt_request & CPU_INTERRUPT_HARD;
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}
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int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
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int rw, int mmu_idx);
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#endif /* _CPU_MOXIE_H */
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