4de9b249d3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
40 lines
910 B
C
40 lines
910 B
C
#include "vl.h"
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#include "cpu.h"
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/* Raise IRQ to CPU if necessary. It must be called every time the active
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IRQ may change */
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void cpu_mips_update_irq(CPUState *env)
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{
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if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
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(env->CP0_Status & (1 << CP0St_IE)) &&
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!(env->hflags & MIPS_HFLAG_EXL) &&
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!(env->hflags & MIPS_HFLAG_ERL) &&
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!(env->hflags & MIPS_HFLAG_DM)) {
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if (! (env->interrupt_request & CPU_INTERRUPT_HARD)) {
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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}
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} else {
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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}
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void cpu_mips_irq_request(void *opaque, int irq, int level)
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{
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CPUState *env = first_cpu;
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uint32_t mask;
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if (irq >= 16)
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return;
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mask = 1 << (irq + CP0Ca_IP);
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if (level) {
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env->CP0_Cause |= mask;
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} else {
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env->CP0_Cause &= ~mask;
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}
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cpu_mips_update_irq(env);
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}
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