7447545544
This was done with:
sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \
$(git grep -l 'qemu_get_clock\>' )
sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \
$(git grep -l 'qemu_new_timer\>' )
after checking that get_clock and new_timer never occur twice
on the same line. There were no missed occurrences; however, even
if there had been, they would have been caught by the compiler.
There was exactly one false positive in qemu_run_timers:
- current_time = qemu_get_clock (clock);
+ current_time = qemu_get_clock_ns (clock);
which is of course not in this patch.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
97 lines
2.6 KiB
C
97 lines
2.6 KiB
C
/*
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* TI OMAP2 32kHz sync timer emulation.
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*
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* Copyright (C) 2007-2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) any later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "qemu-timer.h"
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#include "omap.h"
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struct omap_synctimer_s {
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uint32_t val;
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uint16_t readh;
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};
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/* 32-kHz Sync Timer of the OMAP2 */
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static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
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return muldiv64(qemu_get_clock_ns(vm_clock), 0x8000, get_ticks_per_sec());
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}
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void omap_synctimer_reset(struct omap_synctimer_s *s)
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{
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s->val = omap_synctimer_read(s);
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}
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static uint32_t omap_synctimer_readw(void *opaque, target_phys_addr_t addr)
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{
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struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
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switch (addr) {
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case 0x00: /* 32KSYNCNT_REV */
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return 0x21;
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case 0x10: /* CR */
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return omap_synctimer_read(s) - s->val;
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}
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OMAP_BAD_REG(addr);
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return 0;
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}
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static uint32_t omap_synctimer_readh(void *opaque, target_phys_addr_t addr)
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{
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struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
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uint32_t ret;
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if (addr & 2)
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return s->readh;
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else {
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ret = omap_synctimer_readw(opaque, addr);
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s->readh = ret >> 16;
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return ret & 0xffff;
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}
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}
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static CPUReadMemoryFunc * const omap_synctimer_readfn[] = {
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omap_badwidth_read32,
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omap_synctimer_readh,
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omap_synctimer_readw,
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};
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static void omap_synctimer_write(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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OMAP_BAD_REG(addr);
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}
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static CPUWriteMemoryFunc * const omap_synctimer_writefn[] = {
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omap_badwidth_write32,
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omap_synctimer_write,
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omap_synctimer_write,
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};
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struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
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struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
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{
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struct omap_synctimer_s *s = qemu_mallocz(sizeof(*s));
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omap_synctimer_reset(s);
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omap_l4_attach(ta, 0, l4_register_io_memory(
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omap_synctimer_readfn, omap_synctimer_writefn, s));
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return s;
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}
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