Tom Musta f11ebbf8d4 target-ppc: Bug Fix: mullwo
On 64-bit implementations, the mullwo result is the 64 bit product of
the signed 32 bit operands.  Fix the implementation to properly deposit
the upper 32 bits into the target register.

Example:

R3 0407DED115077586
R4 53778DF3CA992E09
mullwo 3,3,4
R3 expected : FB9D02730D7735B6
R3 actual   : 000000000D7735B6 (without this patch)

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-09-08 12:50:50 +02:00
2014-08-20 21:15:56 +02:00
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2014-06-05 16:10:33 +02:00
2014-08-01 18:30:08 +01:00
2013-10-11 09:34:56 -07:00
2014-05-07 16:16:43 +00:00
2014-07-07 10:37:40 +00:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
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A fork of QEMU-Nyx which is better suited for my bachelors thesis
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