5a4348d111
The qemu_devtree API is a wrapper around the fdt_ set of APIs. Rename accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [agraf: also convert hw/arm/virt.c] Signed-off-by: Alexander Graf <agraf@suse.de>
582 lines
18 KiB
C
582 lines
18 KiB
C
/*
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* ARM kernel loader.
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the GPL.
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*/
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#include "config.h"
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#include "hw/hw.h"
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#include "hw/arm/arm.h"
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "sysemu/device_tree.h"
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#include "qemu/config-file.h"
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/* Kernel boot protocol is specified in the kernel docs
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* Documentation/arm/Booting and Documentation/arm64/booting.txt
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* They have different preferred image load offsets from system RAM base.
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*/
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#define KERNEL_ARGS_ADDR 0x100
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#define KERNEL_LOAD_ADDR 0x00010000
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#define KERNEL64_LOAD_ADDR 0x00080000
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typedef enum {
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FIXUP_NONE = 0, /* do nothing */
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FIXUP_TERMINATOR, /* end of insns */
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FIXUP_BOARDID, /* overwrite with board ID number */
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FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
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FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
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FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
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FIXUP_BOOTREG, /* overwrite with boot register address */
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FIXUP_DSB, /* overwrite with correct DSB insn for cpu */
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FIXUP_MAX,
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} FixupType;
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typedef struct ARMInsnFixup {
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uint32_t insn;
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FixupType fixup;
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} ARMInsnFixup;
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static const ARMInsnFixup bootloader_aarch64[] = {
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{ 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
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{ 0xaa1f03e1 }, /* mov x1, xzr */
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{ 0xaa1f03e2 }, /* mov x2, xzr */
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{ 0xaa1f03e3 }, /* mov x3, xzr */
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{ 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
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{ 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
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{ 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */
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{ 0 }, /* .word @DTB Higher 32-bits */
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{ 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */
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{ 0 }, /* .word @Kernel Entry Higher 32-bits */
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{ 0, FIXUP_TERMINATOR }
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};
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/* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
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static const ARMInsnFixup bootloader[] = {
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{ 0xe3a00000 }, /* mov r0, #0 */
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{ 0xe59f1004 }, /* ldr r1, [pc, #4] */
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{ 0xe59f2004 }, /* ldr r2, [pc, #4] */
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{ 0xe59ff004 }, /* ldr pc, [pc, #4] */
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{ 0, FIXUP_BOARDID },
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{ 0, FIXUP_ARGPTR },
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{ 0, FIXUP_ENTRYPOINT },
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{ 0, FIXUP_TERMINATOR }
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};
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/* Handling for secondary CPU boot in a multicore system.
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* Unlike the uniprocessor/primary CPU boot, this is platform
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* dependent. The default code here is based on the secondary
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* CPU boot protocol used on realview/vexpress boards, with
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* some parameterisation to increase its flexibility.
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* QEMU platform models for which this code is not appropriate
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* should override write_secondary_boot and secondary_cpu_reset_hook
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* instead.
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*
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* This code enables the interrupt controllers for the secondary
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* CPUs and then puts all the secondary CPUs into a loop waiting
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* for an interprocessor interrupt and polling a configurable
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* location for the kernel secondary CPU entry point.
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*/
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#define DSB_INSN 0xf57ff04f
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#define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
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static const ARMInsnFixup smpboot[] = {
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{ 0xe59f2028 }, /* ldr r2, gic_cpu_if */
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{ 0xe59f0028 }, /* ldr r0, bootreg_addr */
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{ 0xe3a01001 }, /* mov r1, #1 */
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{ 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
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{ 0xe3a010ff }, /* mov r1, #0xff */
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{ 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
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{ 0, FIXUP_DSB }, /* dsb */
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{ 0xe320f003 }, /* wfi */
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{ 0xe5901000 }, /* ldr r1, [r0] */
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{ 0xe1110001 }, /* tst r1, r1 */
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{ 0x0afffffb }, /* beq <wfi> */
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{ 0xe12fff11 }, /* bx r1 */
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{ 0, FIXUP_GIC_CPU_IF }, /* gic_cpu_if: .word 0x.... */
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{ 0, FIXUP_BOOTREG }, /* bootreg_addr: .word 0x.... */
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{ 0, FIXUP_TERMINATOR }
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};
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static void write_bootloader(const char *name, hwaddr addr,
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const ARMInsnFixup *insns, uint32_t *fixupcontext)
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{
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/* Fix up the specified bootloader fragment and write it into
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* guest memory using rom_add_blob_fixed(). fixupcontext is
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* an array giving the values to write in for the fixup types
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* which write a value into the code array.
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*/
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int i, len;
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uint32_t *code;
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len = 0;
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while (insns[len].fixup != FIXUP_TERMINATOR) {
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len++;
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}
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code = g_new0(uint32_t, len);
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for (i = 0; i < len; i++) {
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uint32_t insn = insns[i].insn;
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FixupType fixup = insns[i].fixup;
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switch (fixup) {
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case FIXUP_NONE:
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break;
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case FIXUP_BOARDID:
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case FIXUP_ARGPTR:
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case FIXUP_ENTRYPOINT:
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case FIXUP_GIC_CPU_IF:
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case FIXUP_BOOTREG:
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case FIXUP_DSB:
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insn = fixupcontext[fixup];
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break;
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default:
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abort();
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}
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code[i] = tswap32(insn);
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}
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rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr);
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g_free(code);
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}
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static void default_write_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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uint32_t fixupcontext[FIXUP_MAX];
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fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;
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fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;
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if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
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fixupcontext[FIXUP_DSB] = DSB_INSN;
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} else {
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fixupcontext[FIXUP_DSB] = CP15_DSB_INSN;
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}
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write_bootloader("smpboot", info->smp_loader_start,
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smpboot, fixupcontext);
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}
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static void default_reset_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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CPUARMState *env = &cpu->env;
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stl_phys_notdirty(info->smp_bootreg_addr, 0);
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env->regs[15] = info->smp_loader_start;
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}
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#define WRITE_WORD(p, value) do { \
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stl_phys_notdirty(p, value); \
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p += 4; \
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} while (0)
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static void set_kernel_args(const struct arm_boot_info *info)
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{
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int initrd_size = info->initrd_size;
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hwaddr base = info->loader_start;
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hwaddr p;
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p = base + KERNEL_ARGS_ADDR;
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/* ATAG_CORE */
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WRITE_WORD(p, 5);
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WRITE_WORD(p, 0x54410001);
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WRITE_WORD(p, 1);
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WRITE_WORD(p, 0x1000);
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WRITE_WORD(p, 0);
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/* ATAG_MEM */
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/* TODO: handle multiple chips on one ATAG list */
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WRITE_WORD(p, 4);
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WRITE_WORD(p, 0x54410002);
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WRITE_WORD(p, info->ram_size);
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WRITE_WORD(p, info->loader_start);
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if (initrd_size) {
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/* ATAG_INITRD2 */
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WRITE_WORD(p, 4);
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WRITE_WORD(p, 0x54420005);
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WRITE_WORD(p, info->initrd_start);
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WRITE_WORD(p, initrd_size);
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}
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if (info->kernel_cmdline && *info->kernel_cmdline) {
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/* ATAG_CMDLINE */
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int cmdline_size;
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cmdline_size = strlen(info->kernel_cmdline);
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cpu_physical_memory_write(p + 8, info->kernel_cmdline,
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cmdline_size + 1);
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cmdline_size = (cmdline_size >> 2) + 1;
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WRITE_WORD(p, cmdline_size + 2);
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WRITE_WORD(p, 0x54410009);
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p += cmdline_size * 4;
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}
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if (info->atag_board) {
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/* ATAG_BOARD */
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int atag_board_len;
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uint8_t atag_board_buf[0x1000];
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atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
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WRITE_WORD(p, (atag_board_len + 8) >> 2);
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WRITE_WORD(p, 0x414f4d50);
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cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
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p += atag_board_len;
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}
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/* ATAG_END */
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WRITE_WORD(p, 0);
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WRITE_WORD(p, 0);
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}
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static void set_kernel_args_old(const struct arm_boot_info *info)
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{
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hwaddr p;
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const char *s;
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int initrd_size = info->initrd_size;
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hwaddr base = info->loader_start;
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/* see linux/include/asm-arm/setup.h */
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p = base + KERNEL_ARGS_ADDR;
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/* page_size */
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WRITE_WORD(p, 4096);
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/* nr_pages */
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WRITE_WORD(p, info->ram_size / 4096);
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/* ramdisk_size */
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WRITE_WORD(p, 0);
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#define FLAG_READONLY 1
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#define FLAG_RDLOAD 4
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#define FLAG_RDPROMPT 8
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/* flags */
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WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
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/* rootdev */
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WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
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/* video_num_cols */
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WRITE_WORD(p, 0);
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/* video_num_rows */
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WRITE_WORD(p, 0);
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/* video_x */
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WRITE_WORD(p, 0);
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/* video_y */
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WRITE_WORD(p, 0);
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/* memc_control_reg */
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WRITE_WORD(p, 0);
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/* unsigned char sounddefault */
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/* unsigned char adfsdrives */
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/* unsigned char bytes_per_char_h */
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/* unsigned char bytes_per_char_v */
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WRITE_WORD(p, 0);
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/* pages_in_bank[4] */
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WRITE_WORD(p, 0);
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WRITE_WORD(p, 0);
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WRITE_WORD(p, 0);
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WRITE_WORD(p, 0);
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/* pages_in_vram */
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WRITE_WORD(p, 0);
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/* initrd_start */
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if (initrd_size) {
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WRITE_WORD(p, info->initrd_start);
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} else {
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WRITE_WORD(p, 0);
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}
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/* initrd_size */
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WRITE_WORD(p, initrd_size);
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/* rd_start */
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WRITE_WORD(p, 0);
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/* system_rev */
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WRITE_WORD(p, 0);
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/* system_serial_low */
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WRITE_WORD(p, 0);
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/* system_serial_high */
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WRITE_WORD(p, 0);
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/* mem_fclk_21285 */
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WRITE_WORD(p, 0);
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/* zero unused fields */
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while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
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WRITE_WORD(p, 0);
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}
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s = info->kernel_cmdline;
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if (s) {
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cpu_physical_memory_write(p, s, strlen(s) + 1);
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} else {
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WRITE_WORD(p, 0);
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}
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}
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static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo)
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{
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void *fdt = NULL;
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int size, rc;
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uint32_t acells, scells;
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if (binfo->dtb_filename) {
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char *filename;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
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if (!filename) {
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fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
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goto fail;
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}
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fdt = load_device_tree(filename, &size);
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if (!fdt) {
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fprintf(stderr, "Couldn't open dtb file %s\n", filename);
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g_free(filename);
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goto fail;
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}
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g_free(filename);
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} else if (binfo->get_dtb) {
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fdt = binfo->get_dtb(binfo, &size);
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if (!fdt) {
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fprintf(stderr, "Board was unable to create a dtb blob\n");
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goto fail;
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}
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}
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acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells");
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scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells");
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if (acells == 0 || scells == 0) {
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fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
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goto fail;
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}
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if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
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/* This is user error so deserves a friendlier error message
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* than the failure of setprop_sized_cells would provide
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*/
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fprintf(stderr, "qemu: dtb file not compatible with "
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"RAM size > 4GB\n");
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goto fail;
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}
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rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
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acells, binfo->loader_start,
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scells, binfo->ram_size);
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if (rc < 0) {
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fprintf(stderr, "couldn't set /memory/reg\n");
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goto fail;
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}
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if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
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rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
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binfo->kernel_cmdline);
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if (rc < 0) {
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fprintf(stderr, "couldn't set /chosen/bootargs\n");
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goto fail;
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}
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}
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if (binfo->initrd_size) {
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rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
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binfo->initrd_start);
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if (rc < 0) {
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fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
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goto fail;
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}
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rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
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binfo->initrd_start + binfo->initrd_size);
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if (rc < 0) {
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fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
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goto fail;
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}
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}
|
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|
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if (binfo->modify_dtb) {
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binfo->modify_dtb(binfo, fdt);
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}
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|
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qemu_fdt_dumpdtb(fdt, size);
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cpu_physical_memory_write(addr, fdt, size);
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|
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g_free(fdt);
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|
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return 0;
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|
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fail:
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g_free(fdt);
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return -1;
|
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}
|
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|
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static void do_cpu_reset(void *opaque)
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{
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ARMCPU *cpu = opaque;
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CPUARMState *env = &cpu->env;
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const struct arm_boot_info *info = env->boot_info;
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|
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cpu_reset(CPU(cpu));
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if (info) {
|
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if (!info->is_linux) {
|
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/* Jump to the entry point. */
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env->regs[15] = info->entry & 0xfffffffe;
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env->thumb = info->entry & 1;
|
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} else {
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if (CPU(cpu) == first_cpu) {
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if (env->aarch64) {
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env->pc = info->loader_start;
|
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} else {
|
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env->regs[15] = info->loader_start;
|
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}
|
|
|
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if (!info->dtb_filename) {
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if (old_param) {
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set_kernel_args_old(info);
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} else {
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set_kernel_args(info);
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}
|
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}
|
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} else {
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info->secondary_cpu_reset_hook(cpu, info);
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}
|
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}
|
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}
|
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}
|
|
|
|
void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
|
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{
|
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CPUState *cs = CPU(cpu);
|
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int kernel_size;
|
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int initrd_size;
|
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int is_linux = 0;
|
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uint64_t elf_entry;
|
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hwaddr entry, kernel_load_offset;
|
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int big_endian;
|
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static const ARMInsnFixup *primary_loader;
|
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|
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/* Load the kernel. */
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if (!info->kernel_filename) {
|
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/* If no kernel specified, do nothing; we will start from address 0
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* (typically a boot ROM image) in the same way as hardware.
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*/
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return;
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}
|
|
|
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if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
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primary_loader = bootloader_aarch64;
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kernel_load_offset = KERNEL64_LOAD_ADDR;
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} else {
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primary_loader = bootloader;
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kernel_load_offset = KERNEL_LOAD_ADDR;
|
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}
|
|
|
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info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
|
|
|
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if (!info->secondary_cpu_reset_hook) {
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info->secondary_cpu_reset_hook = default_reset_secondary;
|
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}
|
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if (!info->write_secondary_boot) {
|
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info->write_secondary_boot = default_write_secondary;
|
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}
|
|
|
|
if (info->nb_cpus == 0)
|
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info->nb_cpus = 1;
|
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|
|
#ifdef TARGET_WORDS_BIGENDIAN
|
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big_endian = 1;
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#else
|
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big_endian = 0;
|
|
#endif
|
|
|
|
/* We want to put the initrd far enough into RAM that when the
|
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* kernel is uncompressed it will not clobber the initrd. However
|
|
* on boards without much RAM we must ensure that we still leave
|
|
* enough room for a decent sized initrd, and on boards with large
|
|
* amounts of RAM we must avoid the initrd being so far up in RAM
|
|
* that it is outside lowmem and inaccessible to the kernel.
|
|
* So for boards with less than 256MB of RAM we put the initrd
|
|
* halfway into RAM, and for boards with 256MB of RAM or more we put
|
|
* the initrd at 128MB.
|
|
*/
|
|
info->initrd_start = info->loader_start +
|
|
MIN(info->ram_size / 2, 128 * 1024 * 1024);
|
|
|
|
/* Assume that raw images are linux kernels, and ELF images are not. */
|
|
kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
|
|
NULL, NULL, big_endian, ELF_MACHINE, 1);
|
|
entry = elf_entry;
|
|
if (kernel_size < 0) {
|
|
kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
|
|
&is_linux);
|
|
}
|
|
if (kernel_size < 0) {
|
|
entry = info->loader_start + kernel_load_offset;
|
|
kernel_size = load_image_targphys(info->kernel_filename, entry,
|
|
info->ram_size - kernel_load_offset);
|
|
is_linux = 1;
|
|
}
|
|
if (kernel_size < 0) {
|
|
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
|
info->kernel_filename);
|
|
exit(1);
|
|
}
|
|
info->entry = entry;
|
|
if (is_linux) {
|
|
uint32_t fixupcontext[FIXUP_MAX];
|
|
|
|
if (info->initrd_filename) {
|
|
initrd_size = load_ramdisk(info->initrd_filename,
|
|
info->initrd_start,
|
|
info->ram_size -
|
|
info->initrd_start);
|
|
if (initrd_size < 0) {
|
|
initrd_size = load_image_targphys(info->initrd_filename,
|
|
info->initrd_start,
|
|
info->ram_size -
|
|
info->initrd_start);
|
|
}
|
|
if (initrd_size < 0) {
|
|
fprintf(stderr, "qemu: could not load initrd '%s'\n",
|
|
info->initrd_filename);
|
|
exit(1);
|
|
}
|
|
} else {
|
|
initrd_size = 0;
|
|
}
|
|
info->initrd_size = initrd_size;
|
|
|
|
fixupcontext[FIXUP_BOARDID] = info->board_id;
|
|
|
|
/* for device tree boot, we pass the DTB directly in r2. Otherwise
|
|
* we point to the kernel args.
|
|
*/
|
|
if (info->dtb_filename || info->get_dtb) {
|
|
/* Place the DTB after the initrd in memory. Note that some
|
|
* kernels will trash anything in the 4K page the initrd
|
|
* ends in, so make sure the DTB isn't caught up in that.
|
|
*/
|
|
hwaddr dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
|
|
4096);
|
|
if (load_dtb(dtb_start, info)) {
|
|
exit(1);
|
|
}
|
|
fixupcontext[FIXUP_ARGPTR] = dtb_start;
|
|
} else {
|
|
fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;
|
|
if (info->ram_size >= (1ULL << 32)) {
|
|
fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
|
|
" Linux kernel using ATAGS (try passing a device tree"
|
|
" using -dtb)\n");
|
|
exit(1);
|
|
}
|
|
}
|
|
fixupcontext[FIXUP_ENTRYPOINT] = entry;
|
|
|
|
write_bootloader("bootloader", info->loader_start,
|
|
primary_loader, fixupcontext);
|
|
|
|
if (info->nb_cpus > 1) {
|
|
info->write_secondary_boot(cpu, info);
|
|
}
|
|
}
|
|
info->is_linux = is_linux;
|
|
|
|
for (; cs; cs = CPU_NEXT(cs)) {
|
|
cpu = ARM_CPU(cs);
|
|
cpu->env.boot_info = info;
|
|
qemu_register_reset(do_cpu_reset, cpu);
|
|
}
|
|
}
|