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		4be746345f
		
	
	
	
	
		
			
			Device models should access their block backends only through the block-backend.h API. Convert them, and drop direct includes of inappropriate headers. Just four uses of BlockDriverState are left: * The Xen paravirtual block device backend (xen_disk.c) opens images itself when set up via xenbus, bypassing blockdev.c. I figure it should go through qmp_blockdev_add() instead. * Device model "usb-storage" prompts for keys. No other device model does, and this one probably shouldn't do it, either. * ide_issue_trim_cb() uses bdrv_aio_discard() instead of blk_aio_discard() because it fishes its backend out of a BlockAIOCB, which has only the BlockDriverState. * PC87312State has an unused BlockDriverState[] member. The next two commits take care of the latter two. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
		
			
				
	
	
		
			203 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			203 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * PXA270-based Intel Mainstone platforms.
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|  *
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|  * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
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|  *                                    <akuster@mvista.com>
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|  *
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|  * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
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|  *
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|  * This code is licensed under the GNU GPL v2.
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|  *
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|  * Contributions after 2012-01-13 are licensed under the terms of the
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|  * GNU GPL, version 2 or (at your option) any later version.
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|  */
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| #include "hw/hw.h"
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| #include "hw/arm/pxa.h"
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| #include "hw/arm/arm.h"
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| #include "net/net.h"
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| #include "hw/devices.h"
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| #include "hw/boards.h"
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| #include "hw/block/flash.h"
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| #include "sysemu/block-backend.h"
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| #include "hw/sysbus.h"
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| #include "exec/address-spaces.h"
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| #include "sysemu/qtest.h"
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| 
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| /* Device addresses */
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| #define MST_FPGA_PHYS	0x08000000
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| #define MST_ETH_PHYS	0x10000300
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| #define MST_FLASH_0		0x00000000
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| #define MST_FLASH_1		0x04000000
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| 
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| /* IRQ definitions */
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| #define MMC_IRQ       0
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| #define USIM_IRQ      1
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| #define USBC_IRQ      2
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| #define ETHERNET_IRQ  3
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| #define AC97_IRQ      4
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| #define PEN_IRQ       5
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| #define MSINS_IRQ     6
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| #define EXBRD_IRQ     7
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| #define S0_CD_IRQ     9
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| #define S0_STSCHG_IRQ 10
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| #define S0_IRQ        11
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| #define S1_CD_IRQ     13
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| #define S1_STSCHG_IRQ 14
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| #define S1_IRQ        15
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| 
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| static const struct keymap map[0xE0] = {
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|     [0 ... 0xDF] = { -1, -1 },
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|     [0x1e] = {0,0}, /* a */
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|     [0x30] = {0,1}, /* b */
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|     [0x2e] = {0,2}, /* c */
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|     [0x20] = {0,3}, /* d */
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|     [0x12] = {0,4}, /* e */
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|     [0x21] = {0,5}, /* f */
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|     [0x22] = {1,0}, /* g */
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|     [0x23] = {1,1}, /* h */
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|     [0x17] = {1,2}, /* i */
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|     [0x24] = {1,3}, /* j */
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|     [0x25] = {1,4}, /* k */
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|     [0x26] = {1,5}, /* l */
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|     [0x32] = {2,0}, /* m */
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|     [0x31] = {2,1}, /* n */
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|     [0x18] = {2,2}, /* o */
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|     [0x19] = {2,3}, /* p */
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|     [0x10] = {2,4}, /* q */
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|     [0x13] = {2,5}, /* r */
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|     [0x1f] = {3,0}, /* s */
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|     [0x14] = {3,1}, /* t */
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|     [0x16] = {3,2}, /* u */
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|     [0x2f] = {3,3}, /* v */
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|     [0x11] = {3,4}, /* w */
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|     [0x2d] = {3,5}, /* x */
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|     [0x15] = {4,2}, /* y */
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|     [0x2c] = {4,3}, /* z */
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|     [0xc7] = {5,0}, /* Home */
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|     [0x2a] = {5,1}, /* shift */
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|     /*
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|      * There are two matrix positions which map to space,
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|      * but QEMU can only use one of them for the reverse
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|      * mapping, so simply use the second one.
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|      */
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|     /* [0x39] = {5,2}, space */
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|     [0x39] = {5,3}, /* space */
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|     /*
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|      * Matrix position {5,4} and other keys are missing here.
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|      * TODO: Compare with Linux code and test real hardware.
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|      */
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|     [0x1c] = {5,5}, /* enter (TODO: might be wrong) */
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|     [0xc8] = {6,0}, /* up */
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|     [0xd0] = {6,1}, /* down */
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|     [0xcb] = {6,2}, /* left */
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|     [0xcd] = {6,3}, /* right */
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| };
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| 
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| enum mainstone_model_e { mainstone };
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| 
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| #define MAINSTONE_RAM	0x04000000
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| #define MAINSTONE_ROM	0x00800000
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| #define MAINSTONE_FLASH	0x02000000
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| 
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| static struct arm_boot_info mainstone_binfo = {
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|     .loader_start = PXA2XX_SDRAM_BASE,
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|     .ram_size = 0x04000000,
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| };
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| 
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| static void mainstone_common_init(MemoryRegion *address_space_mem,
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|                                   MachineState *machine,
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|                                   enum mainstone_model_e model, int arm_id)
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| {
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|     uint32_t sector_len = 256 * 1024;
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|     hwaddr mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
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|     PXA2xxState *mpu;
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|     DeviceState *mst_irq;
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|     DriveInfo *dinfo;
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|     int i;
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|     int be;
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|     MemoryRegion *rom = g_new(MemoryRegion, 1);
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|     const char *cpu_model = machine->cpu_model;
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| 
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|     if (!cpu_model)
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|         cpu_model = "pxa270-c5";
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| 
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|     /* Setup CPU & memory */
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|     mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
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|     memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM,
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|                            &error_abort);
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|     vmstate_register_ram_global(rom);
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|     memory_region_set_readonly(rom, true);
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|     memory_region_add_subregion(address_space_mem, 0, rom);
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| 
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| #ifdef TARGET_WORDS_BIGENDIAN
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|     be = 1;
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| #else
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|     be = 0;
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| #endif
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|     /* There are two 32MiB flash devices on the board */
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|     for (i = 0; i < 2; i ++) {
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|         dinfo = drive_get(IF_PFLASH, 0, i);
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|         if (!dinfo) {
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|             if (qtest_enabled()) {
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|                 break;
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|             }
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|             fprintf(stderr, "Two flash images must be given with the "
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|                     "'pflash' parameter\n");
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|             exit(1);
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|         }
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| 
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|         if (!pflash_cfi01_register(mainstone_flash_base[i], NULL,
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|                                    i ? "mainstone.flash1" : "mainstone.flash0",
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|                                    MAINSTONE_FLASH,
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|                                    blk_by_legacy_dinfo(dinfo),
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|                                    sector_len, MAINSTONE_FLASH / sector_len,
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|                                    4, 0, 0, 0, 0, be)) {
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|             fprintf(stderr, "qemu: Error registering flash memory.\n");
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|             exit(1);
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|         }
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|     }
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| 
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|     mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
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|                     qdev_get_gpio_in(mpu->gpio, 0));
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| 
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|     /* setup keypad */
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|     pxa27x_register_keypad(mpu->kp, map, 0xe0);
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| 
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|     /* MMC/SD host */
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|     pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
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| 
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|     pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0],
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|             qdev_get_gpio_in(mst_irq, S0_IRQ),
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|             qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
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|     pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1],
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|             qdev_get_gpio_in(mst_irq, S1_IRQ),
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|             qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
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| 
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|     smc91c111_init(&nd_table[0], MST_ETH_PHYS,
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|                     qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
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| 
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|     mainstone_binfo.kernel_filename = machine->kernel_filename;
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|     mainstone_binfo.kernel_cmdline = machine->kernel_cmdline;
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|     mainstone_binfo.initrd_filename = machine->initrd_filename;
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|     mainstone_binfo.board_id = arm_id;
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|     arm_load_kernel(mpu->cpu, &mainstone_binfo);
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| }
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| 
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| static void mainstone_init(MachineState *machine)
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| {
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|     mainstone_common_init(get_system_memory(), machine, mainstone, 0x196);
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| }
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| 
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| static QEMUMachine mainstone2_machine = {
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|     .name = "mainstone",
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|     .desc = "Mainstone II (PXA27x)",
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|     .init = mainstone_init,
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| };
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| 
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| static void mainstone_machine_init(void)
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| {
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|     qemu_register_machine(&mainstone2_machine);
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| }
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| 
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| machine_init(mainstone_machine_init);
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