ASoC: ti: j721e-evm: Fix clock configuration for ti,j7200-cpb-audio compatible
[ Upstream commit 45ff65e30deb919604e68faed156ad96ce7474d9 ] For 'ti,j7200-cpb-audio' compatible, there is support for only one PLL for 48k. For 11025, 22050, 44100 and 88200 sampling rates, due to absence of J721E_CLK_PARENT_44100, we get EINVAL while running any audio application. Add support for these rates by using the 48k parent clock and adjusting the clock for these rates later in j721e_configure_refclk. Fixes: 6748d0559059 ("ASoC: ti: Add custom machine driver for j721e EVM (CPB and IVI)") Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://patch.msgid.link/20250318113524.57100-1-j-choudhary@ti.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -182,6 +182,8 @@ static int j721e_configure_refclk(struct j721e_priv *priv,
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clk_id = J721E_CLK_PARENT_48000;
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else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_44100])
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clk_id = J721E_CLK_PARENT_44100;
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else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_48000])
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clk_id = J721E_CLK_PARENT_48000;
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else
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return ret;
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