hamza.kesraoui/sst-linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clocksource/drivers/arm_arch_timer: Remove any trace of the TVAL programming interface

Browse Source 
TVAL usage is now long gone, get rid of the leftovers.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211017124225.3018098-11-maz@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Marc Zyngier 2021-10-17 13:42:18 +01:00 committed by Daniel Lezcano
parent 012f188504
commit 41f8d02a6a
2 changed files with 0 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/clocksource/arm_arch_timer.c
View File

@ -48,10 +48,8 @@
#define CNTPCT_LO 0x08 #define CNTPCT_LO 0x08
#define CNTFRQ 0x10 #define CNTFRQ 0x10
#define CNTP_CVAL_LO 0x20 #define CNTP_CVAL_LO 0x20
#define CNTP_TVAL 0x28
#define CNTP_CTL 0x2c #define CNTP_CTL 0x2c
#define CNTV_CVAL_LO 0x30 #define CNTV_CVAL_LO 0x30
#define CNTV_TVAL 0x38
#define CNTV_CTL 0x3c #define CNTV_CTL 0x3c
static unsigned arch_timers_present __initdata; static unsigned arch_timers_present __initdata;
@ -111,9 +109,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
case ARCH_TIMER_REG_CTRL: case ARCH_TIMER_REG_CTRL:
writel_relaxed((u32)val, timer->base + CNTP_CTL); writel_relaxed((u32)val, timer->base + CNTP_CTL);
break; break;
case ARCH_TIMER_REG_TVAL:
writel_relaxed((u32)val, timer->base + CNTP_TVAL);
break;
case ARCH_TIMER_REG_CVAL: case ARCH_TIMER_REG_CVAL:
/* /*
* Not guaranteed to be atomic, so the timer * Not guaranteed to be atomic, so the timer
@ -130,9 +125,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
case ARCH_TIMER_REG_CTRL: case ARCH_TIMER_REG_CTRL:
writel_relaxed((u32)val, timer->base + CNTV_CTL); writel_relaxed((u32)val, timer->base + CNTV_CTL);
break; break;
case ARCH_TIMER_REG_TVAL:
writel_relaxed((u32)val, timer->base + CNTV_TVAL);
break;
case ARCH_TIMER_REG_CVAL: case ARCH_TIMER_REG_CVAL:
/* Same restriction as above */ /* Same restriction as above */
writeq_relaxed(val, timer->base + CNTV_CVAL_LO); writeq_relaxed(val, timer->base + CNTV_CVAL_LO);

1
include/clocksource/arm_arch_timer.h
View File

@ -24,7 +24,6 @@
enum arch_timer_reg { enum arch_timer_reg {
ARCH_TIMER_REG_CTRL, ARCH_TIMER_REG_CTRL,
ARCH_TIMER_REG_TVAL,
ARCH_TIMER_REG_CVAL, ARCH_TIMER_REG_CVAL,
}; };