counter: stm32-timer-cnt: add power management support
Add suspend/resume PM sleep ops. When going to low power, enforce the counter isn't active. Gracefully restore its state upon resume in case it's been left enabled prior to suspend. Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -12,6 +12,7 @@
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#include <linux/iio/types.h>
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#include <linux/iio/types.h>
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#include <linux/mfd/stm32-timers.h>
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#include <linux/mfd/stm32-timers.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#define TIM_CCMR_CCXS (BIT(8) | BIT(0))
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#define TIM_CCMR_CCXS (BIT(8) | BIT(0))
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@ -20,11 +21,20 @@
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#define TIM_CCER_MASK (TIM_CCER_CC1P | TIM_CCER_CC1NP | \
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#define TIM_CCER_MASK (TIM_CCER_CC1P | TIM_CCER_CC1NP | \
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TIM_CCER_CC2P | TIM_CCER_CC2NP)
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TIM_CCER_CC2P | TIM_CCER_CC2NP)
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struct stm32_timer_regs {
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u32 cr1;
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u32 cnt;
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u32 smcr;
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u32 arr;
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};
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struct stm32_timer_cnt {
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struct stm32_timer_cnt {
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struct counter_device counter;
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struct counter_device counter;
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struct regmap *regmap;
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struct regmap *regmap;
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struct clk *clk;
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struct clk *clk;
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u32 ceiling;
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u32 ceiling;
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bool enabled;
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struct stm32_timer_regs bak;
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};
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};
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/**
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/**
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@ -224,6 +234,9 @@ static ssize_t stm32_count_enable_write(struct counter_device *counter,
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clk_disable(priv->clk);
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clk_disable(priv->clk);
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}
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}
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/* Keep enabled state to properly handle low power states */
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priv->enabled = enable;
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return len;
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return len;
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}
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}
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@ -358,10 +371,59 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev)
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priv->counter.num_signals = ARRAY_SIZE(stm32_signals);
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priv->counter.num_signals = ARRAY_SIZE(stm32_signals);
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priv->counter.priv = priv;
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priv->counter.priv = priv;
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platform_set_drvdata(pdev, priv);
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/* Register Counter device */
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/* Register Counter device */
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return devm_counter_register(dev, &priv->counter);
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return devm_counter_register(dev, &priv->counter);
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}
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}
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static int __maybe_unused stm32_timer_cnt_suspend(struct device *dev)
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{
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struct stm32_timer_cnt *priv = dev_get_drvdata(dev);
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/* Only take care of enabled counter: don't disturb other MFD child */
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if (priv->enabled) {
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/* Backup registers that may get lost in low power mode */
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regmap_read(priv->regmap, TIM_SMCR, &priv->bak.smcr);
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regmap_read(priv->regmap, TIM_ARR, &priv->bak.arr);
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regmap_read(priv->regmap, TIM_CNT, &priv->bak.cnt);
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regmap_read(priv->regmap, TIM_CR1, &priv->bak.cr1);
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/* Disable the counter */
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
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clk_disable(priv->clk);
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}
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return pinctrl_pm_select_sleep_state(dev);
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}
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static int __maybe_unused stm32_timer_cnt_resume(struct device *dev)
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{
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struct stm32_timer_cnt *priv = dev_get_drvdata(dev);
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int ret;
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ret = pinctrl_pm_select_default_state(dev);
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if (ret)
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return ret;
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if (priv->enabled) {
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clk_enable(priv->clk);
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/* Restore registers that may have been lost */
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regmap_write(priv->regmap, TIM_SMCR, priv->bak.smcr);
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regmap_write(priv->regmap, TIM_ARR, priv->bak.arr);
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regmap_write(priv->regmap, TIM_CNT, priv->bak.cnt);
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/* Also re-enables the counter */
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regmap_write(priv->regmap, TIM_CR1, priv->bak.cr1);
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}
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(stm32_timer_cnt_pm_ops, stm32_timer_cnt_suspend,
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stm32_timer_cnt_resume);
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static const struct of_device_id stm32_timer_cnt_of_match[] = {
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static const struct of_device_id stm32_timer_cnt_of_match[] = {
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{ .compatible = "st,stm32-timer-counter", },
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{ .compatible = "st,stm32-timer-counter", },
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{},
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{},
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@ -373,6 +435,7 @@ static struct platform_driver stm32_timer_cnt_driver = {
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.driver = {
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.driver = {
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.name = "stm32-timer-counter",
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.name = "stm32-timer-counter",
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.of_match_table = stm32_timer_cnt_of_match,
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.of_match_table = stm32_timer_cnt_of_match,
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.pm = &stm32_timer_cnt_pm_ops,
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},
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},
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};
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};
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module_platform_driver(stm32_timer_cnt_driver);
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module_platform_driver(stm32_timer_cnt_driver);
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