Yuanfang Zhang cb385b93c8 coresight-etm4x: add isb() before reading the TRCSTATR ... [ Upstream commit 4ff6039ffb79a4a8a44b63810a8a2f2b43264856 ] As recommended by section 4.3.7 ("Synchronization when using system instructions to progrom the trace unit") of ARM IHI 0064H.b, the self-hosted trace analyzer must perform a Context synchronization event between writing to the TRCPRGCTLR and reading the TRCSTATR. Additionally, add an ISB between the each read of TRCSTATR on coresight_timeout() when using system instructions to program the trace unit. Fixes: 1ab3bb9df5 ("coresight: etm4x: Add necessary synchronization for sysreg access") Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250116-etm_sync-v4-1-39f2b05e9514@quicinc.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2025-04-10 14:33:35 +02:00
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coresight	coresight-etm4x: add isb() before reading the TRCSTATR	2025-04-10 14:33:35 +02:00
intel_th	intel_th: pci: Add Panther Lake-P/U support	2025-03-13 12:53:22 +01:00
ptt	hwtracing: hisi_ptt: Move type check to the beginning of hisi_ptt_pmu_event_init()	2024-03-26 18:20:58 -04:00
stm	stm class: Fix a double free in stm_register_device()	2024-06-12 11:03:40 +02:00
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