Feifei Xu 5d735f83c2 drm/amd/include:cleanup vega10 uvd header files. ...

Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2017-12-06 12:48:19 -05:00

..

uvd_4_0_d.h

drm/amd/amdgpu: Introduction of SI registers (v2)

2016-11-11 10:21:07 -05:00

uvd_4_0_sh_mask.h

drm/amd/amdgpu: Introduction of SI registers (v2)

2016-11-11 10:21:07 -05:00

uvd_4_2_d.h

drm/amdgpu: add support for UVD_NO_OP register

2016-08-24 16:25:04 -04:00

uvd_4_2_sh_mask.h

…

uvd_5_0_d.h

drm/amdgpu: switch UVD code to use UVD_NO_OP for padding

2016-08-24 16:25:05 -04:00

uvd_5_0_enum.h

…

uvd_5_0_sh_mask.h

…

uvd_6_0_d.h

drm/amdgpu: add uvd enc registers in header

2017-10-06 17:43:53 -04:00

uvd_6_0_enum.h

…

uvd_6_0_sh_mask.h

…

uvd_7_0_offset.h

drm/amd/include:cleanup vega10 uvd header files.

2017-12-06 12:48:19 -05:00

uvd_7_0_sh_mask.h

drm/amd/include:cleanup vega10 uvd header files.

2017-12-06 12:48:19 -05:00