c0071c7aa5
Add code for hardware initialization and reset Add code for semaphore handling Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
142 lines
3.1 KiB
C
142 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018 Intel Corporation */
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#include <linux/delay.h>
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#include "igc_hw.h"
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/**
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* igc_get_hw_semaphore_i225 - Acquire hardware semaphore
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* @hw: pointer to the HW structure
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*
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* Acquire the HW semaphore to access the PHY or NVM
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*/
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static s32 igc_get_hw_semaphore_i225(struct igc_hw *hw)
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{
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s32 timeout = hw->nvm.word_size + 1;
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s32 i = 0;
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u32 swsm;
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/* Get the SW semaphore */
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while (i < timeout) {
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swsm = rd32(IGC_SWSM);
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if (!(swsm & IGC_SWSM_SMBI))
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break;
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usleep_range(500, 600);
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i++;
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}
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if (i == timeout) {
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/* In rare circumstances, the SW semaphore may already be held
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* unintentionally. Clear the semaphore once before giving up.
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*/
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if (hw->dev_spec._base.clear_semaphore_once) {
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hw->dev_spec._base.clear_semaphore_once = false;
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igc_put_hw_semaphore(hw);
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for (i = 0; i < timeout; i++) {
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swsm = rd32(IGC_SWSM);
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if (!(swsm & IGC_SWSM_SMBI))
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break;
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usleep_range(500, 600);
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}
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}
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/* If we do not have the semaphore here, we have to give up. */
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if (i == timeout) {
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hw_dbg("Driver can't access device - SMBI bit is set.\n");
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return -IGC_ERR_NVM;
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}
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}
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/* Get the FW semaphore. */
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for (i = 0; i < timeout; i++) {
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swsm = rd32(IGC_SWSM);
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wr32(IGC_SWSM, swsm | IGC_SWSM_SWESMBI);
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/* Semaphore acquired if bit latched */
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if (rd32(IGC_SWSM) & IGC_SWSM_SWESMBI)
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break;
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usleep_range(500, 600);
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}
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if (i == timeout) {
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/* Release semaphores */
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igc_put_hw_semaphore(hw);
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hw_dbg("Driver can't access the NVM\n");
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return -IGC_ERR_NVM;
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}
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return 0;
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}
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/**
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* igc_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
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* @hw: pointer to the HW structure
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* @mask: specifies which semaphore to acquire
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*
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* Acquire the SW/FW semaphore to access the PHY or NVM. The mask
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* will also specify which port we're acquiring the lock for.
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*/
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s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask)
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{
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s32 i = 0, timeout = 200;
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u32 fwmask = mask << 16;
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u32 swmask = mask;
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s32 ret_val = 0;
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u32 swfw_sync;
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while (i < timeout) {
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if (igc_get_hw_semaphore_i225(hw)) {
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ret_val = -IGC_ERR_SWFW_SYNC;
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goto out;
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}
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swfw_sync = rd32(IGC_SW_FW_SYNC);
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if (!(swfw_sync & (fwmask | swmask)))
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break;
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/* Firmware currently using resource (fwmask) */
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igc_put_hw_semaphore(hw);
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mdelay(5);
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i++;
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}
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if (i == timeout) {
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hw_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");
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ret_val = -IGC_ERR_SWFW_SYNC;
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goto out;
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}
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swfw_sync |= swmask;
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wr32(IGC_SW_FW_SYNC, swfw_sync);
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igc_put_hw_semaphore(hw);
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out:
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return ret_val;
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}
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/**
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* igc_release_swfw_sync_i225 - Release SW/FW semaphore
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* @hw: pointer to the HW structure
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* @mask: specifies which semaphore to acquire
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*
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* Release the SW/FW semaphore used to access the PHY or NVM. The mask
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* will also specify which port we're releasing the lock for.
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*/
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void igc_release_swfw_sync_i225(struct igc_hw *hw, u16 mask)
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{
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u32 swfw_sync;
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while (igc_get_hw_semaphore_i225(hw))
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; /* Empty */
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swfw_sync = rd32(IGC_SW_FW_SYNC);
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swfw_sync &= ~mask;
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wr32(IGC_SW_FW_SYNC, swfw_sync);
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igc_put_hw_semaphore(hw);
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}
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