313 lines
11 KiB
C++
313 lines
11 KiB
C++
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//===-- SwiftErrorValueTracking.cpp --------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements a limited mem2reg-like analysis to promote uses of function
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// arguments and allocas marked with swiftalloc from memory into virtual
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// registers tracked by this class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/SwiftErrorValueTracking.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/IR/Value.h"
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using namespace llvm;
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Register SwiftErrorValueTracking::getOrCreateVReg(const MachineBasicBlock *MBB,
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const Value *Val) {
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auto Key = std::make_pair(MBB, Val);
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auto It = VRegDefMap.find(Key);
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// If this is the first use of this swifterror value in this basic block,
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// create a new virtual register.
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// After we processed all basic blocks we will satisfy this "upwards exposed
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// use" by inserting a copy or phi at the beginning of this block.
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if (It == VRegDefMap.end()) {
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auto &DL = MF->getDataLayout();
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const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
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auto VReg = MF->getRegInfo().createVirtualRegister(RC);
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VRegDefMap[Key] = VReg;
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VRegUpwardsUse[Key] = VReg;
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return VReg;
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} else
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return It->second;
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}
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void SwiftErrorValueTracking::setCurrentVReg(const MachineBasicBlock *MBB,
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const Value *Val, Register VReg) {
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VRegDefMap[std::make_pair(MBB, Val)] = VReg;
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}
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Register SwiftErrorValueTracking::getOrCreateVRegDefAt(
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const Instruction *I, const MachineBasicBlock *MBB, const Value *Val) {
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auto Key = PointerIntPair<const Instruction *, 1, bool>(I, true);
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auto It = VRegDefUses.find(Key);
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if (It != VRegDefUses.end())
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return It->second;
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auto &DL = MF->getDataLayout();
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const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
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Register VReg = MF->getRegInfo().createVirtualRegister(RC);
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VRegDefUses[Key] = VReg;
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setCurrentVReg(MBB, Val, VReg);
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return VReg;
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}
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Register SwiftErrorValueTracking::getOrCreateVRegUseAt(
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const Instruction *I, const MachineBasicBlock *MBB, const Value *Val) {
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auto Key = PointerIntPair<const Instruction *, 1, bool>(I, false);
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auto It = VRegDefUses.find(Key);
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if (It != VRegDefUses.end())
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return It->second;
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Register VReg = getOrCreateVReg(MBB, Val);
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VRegDefUses[Key] = VReg;
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return VReg;
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}
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/// Set up SwiftErrorVals by going through the function. If the function has
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/// swifterror argument, it will be the first entry.
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void SwiftErrorValueTracking::setFunction(MachineFunction &mf) {
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MF = &mf;
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Fn = &MF->getFunction();
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TLI = MF->getSubtarget().getTargetLowering();
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TII = MF->getSubtarget().getInstrInfo();
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if (!TLI->supportSwiftError())
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return;
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SwiftErrorVals.clear();
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VRegDefMap.clear();
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VRegUpwardsUse.clear();
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VRegDefUses.clear();
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SwiftErrorArg = nullptr;
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// Check if function has a swifterror argument.
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bool HaveSeenSwiftErrorArg = false;
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for (Function::const_arg_iterator AI = Fn->arg_begin(), AE = Fn->arg_end();
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AI != AE; ++AI)
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if (AI->hasSwiftErrorAttr()) {
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assert(!HaveSeenSwiftErrorArg &&
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"Must have only one swifterror parameter");
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(void)HaveSeenSwiftErrorArg; // silence warning.
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HaveSeenSwiftErrorArg = true;
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SwiftErrorArg = &*AI;
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SwiftErrorVals.push_back(&*AI);
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}
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for (const auto &LLVMBB : *Fn)
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for (const auto &Inst : LLVMBB) {
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if (const AllocaInst *Alloca = dyn_cast<AllocaInst>(&Inst))
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if (Alloca->isSwiftError())
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SwiftErrorVals.push_back(Alloca);
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}
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}
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bool SwiftErrorValueTracking::createEntriesInEntryBlock(DebugLoc DbgLoc) {
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if (!TLI->supportSwiftError())
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return false;
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// We only need to do this when we have swifterror parameter or swifterror
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// alloc.
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if (SwiftErrorVals.empty())
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return false;
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MachineBasicBlock *MBB = &*MF->begin();
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auto &DL = MF->getDataLayout();
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auto const *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
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bool Inserted = false;
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for (const auto *SwiftErrorVal : SwiftErrorVals) {
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// We will always generate a copy from the argument. It is always used at
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// least by the 'return' of the swifterror.
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if (SwiftErrorArg && SwiftErrorArg == SwiftErrorVal)
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continue;
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Register VReg = MF->getRegInfo().createVirtualRegister(RC);
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// Assign Undef to Vreg. We construct MI directly to make sure it works
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// with FastISel.
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BuildMI(*MBB, MBB->getFirstNonPHI(), DbgLoc,
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TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
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setCurrentVReg(MBB, SwiftErrorVal, VReg);
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Inserted = true;
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}
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return Inserted;
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}
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/// Propagate swifterror values through the machine function CFG.
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void SwiftErrorValueTracking::propagateVRegs() {
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if (!TLI->supportSwiftError())
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return;
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// We only need to do this when we have swifterror parameter or swifterror
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// alloc.
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if (SwiftErrorVals.empty())
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return;
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// For each machine basic block in reverse post order.
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ReversePostOrderTraversal<MachineFunction *> RPOT(MF);
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for (MachineBasicBlock *MBB : RPOT) {
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// For each swifterror value in the function.
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for (const auto *SwiftErrorVal : SwiftErrorVals) {
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auto Key = std::make_pair(MBB, SwiftErrorVal);
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auto UUseIt = VRegUpwardsUse.find(Key);
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auto VRegDefIt = VRegDefMap.find(Key);
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bool UpwardsUse = UUseIt != VRegUpwardsUse.end();
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Register UUseVReg = UpwardsUse ? UUseIt->second : Register();
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bool DownwardDef = VRegDefIt != VRegDefMap.end();
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assert(!(UpwardsUse && !DownwardDef) &&
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"We can't have an upwards use but no downwards def");
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// If there is no upwards exposed use and an entry for the swifterror in
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// the def map for this value we don't need to do anything: We already
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// have a downward def for this basic block.
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if (!UpwardsUse && DownwardDef)
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continue;
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// Otherwise we either have an upwards exposed use vreg that we need to
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// materialize or need to forward the downward def from predecessors.
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// Check whether we have a single vreg def from all predecessors.
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// Otherwise we need a phi.
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SmallVector<std::pair<MachineBasicBlock *, Register>, 4> VRegs;
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SmallSet<const MachineBasicBlock *, 8> Visited;
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for (auto *Pred : MBB->predecessors()) {
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if (!Visited.insert(Pred).second)
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continue;
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VRegs.push_back(std::make_pair(
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Pred, getOrCreateVReg(Pred, SwiftErrorVal)));
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if (Pred != MBB)
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continue;
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// We have a self-edge.
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// If there was no upwards use in this basic block there is now one: the
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// phi needs to use it self.
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if (!UpwardsUse) {
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UpwardsUse = true;
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UUseIt = VRegUpwardsUse.find(Key);
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assert(UUseIt != VRegUpwardsUse.end());
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UUseVReg = UUseIt->second;
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}
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}
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// We need a phi node if we have more than one predecessor with different
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// downward defs.
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bool needPHI =
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VRegs.size() >= 1 &&
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llvm::find_if(
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VRegs,
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[&](const std::pair<const MachineBasicBlock *, Register> &V)
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-> bool { return V.second != VRegs[0].second; }) !=
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VRegs.end();
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// If there is no upwards exposed used and we don't need a phi just
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// forward the swifterror vreg from the predecessor(s).
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if (!UpwardsUse && !needPHI) {
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assert(!VRegs.empty() &&
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"No predecessors? The entry block should bail out earlier");
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// Just forward the swifterror vreg from the predecessor(s).
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setCurrentVReg(MBB, SwiftErrorVal, VRegs[0].second);
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continue;
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}
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auto DLoc = isa<Instruction>(SwiftErrorVal)
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? cast<Instruction>(SwiftErrorVal)->getDebugLoc()
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: DebugLoc();
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const auto *TII = MF->getSubtarget().getInstrInfo();
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// If we don't need a phi create a copy to the upward exposed vreg.
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if (!needPHI) {
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assert(UpwardsUse);
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assert(!VRegs.empty() &&
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"No predecessors? Is the Calling Convention correct?");
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Register DestReg = UUseVReg;
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BuildMI(*MBB, MBB->getFirstNonPHI(), DLoc, TII->get(TargetOpcode::COPY),
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DestReg)
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.addReg(VRegs[0].second);
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continue;
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}
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// We need a phi: if there is an upwards exposed use we already have a
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// destination virtual register number otherwise we generate a new one.
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auto &DL = MF->getDataLayout();
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auto const *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
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Register PHIVReg =
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UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC);
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MachineInstrBuilder PHI =
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BuildMI(*MBB, MBB->getFirstNonPHI(), DLoc,
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TII->get(TargetOpcode::PHI), PHIVReg);
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for (auto BBRegPair : VRegs) {
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PHI.addReg(BBRegPair.second).addMBB(BBRegPair.first);
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}
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// We did not have a definition in this block before: store the phi's vreg
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// as this block downward exposed def.
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if (!UpwardsUse)
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setCurrentVReg(MBB, SwiftErrorVal, PHIVReg);
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}
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}
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}
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void SwiftErrorValueTracking::preassignVRegs(
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MachineBasicBlock *MBB, BasicBlock::const_iterator Begin,
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BasicBlock::const_iterator End) {
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if (!TLI->supportSwiftError() || SwiftErrorVals.empty())
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return;
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// Iterator over instructions and assign vregs to swifterror defs and uses.
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for (auto It = Begin; It != End; ++It) {
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if (auto *CB = dyn_cast<CallBase>(&*It)) {
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// A call-site with a swifterror argument is both use and def.
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const Value *SwiftErrorAddr = nullptr;
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for (auto &Arg : CB->args()) {
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if (!Arg->isSwiftError())
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continue;
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// Use of swifterror.
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assert(!SwiftErrorAddr && "Cannot have multiple swifterror arguments");
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SwiftErrorAddr = &*Arg;
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assert(SwiftErrorAddr->isSwiftError() &&
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"Must have a swifterror value argument");
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getOrCreateVRegUseAt(&*It, MBB, SwiftErrorAddr);
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}
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if (!SwiftErrorAddr)
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continue;
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// Def of swifterror.
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getOrCreateVRegDefAt(&*It, MBB, SwiftErrorAddr);
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// A load is a use.
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} else if (const LoadInst *LI = dyn_cast<const LoadInst>(&*It)) {
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const Value *V = LI->getOperand(0);
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if (!V->isSwiftError())
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continue;
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getOrCreateVRegUseAt(LI, MBB, V);
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// A store is a def.
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} else if (const StoreInst *SI = dyn_cast<const StoreInst>(&*It)) {
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const Value *SwiftErrorAddr = SI->getOperand(1);
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if (!SwiftErrorAddr->isSwiftError())
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continue;
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// Def of swifterror.
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getOrCreateVRegDefAt(&*It, MBB, SwiftErrorAddr);
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// A return in a swiferror returning function is a use.
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} else if (const ReturnInst *R = dyn_cast<const ReturnInst>(&*It)) {
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const Function *F = R->getParent()->getParent();
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if (!F->getAttributes().hasAttrSomewhere(Attribute::SwiftError))
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continue;
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getOrCreateVRegUseAt(R, MBB, SwiftErrorArg);
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}
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}
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}
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