363 lines
13 KiB
Plaintext
363 lines
13 KiB
Plaintext
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# RUN: llc -run-pass=aarch64-branch-targets %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-arm-none-eabi"
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define hidden i32 @simple_external() "branch-target-enforcement"="true" {
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entry:
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ret i32 0
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}
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define internal i32 @simple_internal() "branch-target-enforcement"="true" {
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entry:
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ret i32 0
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}
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define hidden i32 @ptr_auth() "branch-target-enforcement"="true" {
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entry:
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tail call void asm sideeffect "", "~{lr}"()
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ret i32 0
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}
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define hidden i32 @ptr_auth_b() "branch-target-enforcement"="true" {
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entry:
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tail call void asm sideeffect "", "~{lr}"()
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ret i32 0
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}
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define hidden i32 @jump_table(i32 %a) "branch-target-enforcement"="true" {
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entry:
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switch i32 %a, label %sw.epilog [
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i32 1, label %sw.bb
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i32 2, label %sw.bb1
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i32 3, label %sw.bb2
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i32 4, label %sw.bb3
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i32 5, label %sw.bb4
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]
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sw.bb: ; preds = %entry
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb1: ; preds = %entry
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb2: ; preds = %entry
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb3: ; preds = %entry
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb4: ; preds = %entry
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
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ret i32 0
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}
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@label_address.addr = internal unnamed_addr global i8* blockaddress(@label_address, %return), align 8
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define hidden i32 @label_address() "branch-target-enforcement"="true" {
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entry:
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%0 = load i8*, i8** @label_address.addr, align 8
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indirectbr i8* %0, [label %return, label %lab2]
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lab2: ; preds = %entry
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br label %.split
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return: ; preds = %entry
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br label %.split
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.split: ; preds = %lab2, %return
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%merge = phi i8* [ blockaddress(@label_address, %lab2), %return ], [ blockaddress(@label_address, %return), %lab2 ]
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%merge2 = phi i32 [ 1, %return ], [ 2, %lab2 ]
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store i8* %merge, i8** @label_address.addr, align 8
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ret i32 %merge2
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}
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define hidden i32 @label_address_entry() "branch-target-enforcement"="true" {
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entry:
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%0 = load i8*, i8** @label_address.addr, align 8
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indirectbr i8* %0, [label %return, label %lab2]
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lab2: ; preds = %entry
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br label %.split
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return: ; preds = %entry
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br label %.split
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.split: ; preds = %lab2, %return
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%merge = phi i8* [ blockaddress(@label_address, %lab2), %return ], [ blockaddress(@label_address, %return), %lab2 ]
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%merge2 = phi i32 [ 1, %return ], [ 2, %lab2 ]
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store i8* %merge, i8** @label_address.addr, align 8
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ret i32 %merge2
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}
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define hidden i32 @debug_ptr_auth() "branch-target-enforcement"="true" {
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entry:
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tail call void asm sideeffect "", "~{lr}"()
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ret i32 0
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}
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...
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---
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# External function, could be addres-taken elsewhere so needs BTI JC.
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name: simple_external
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: simple_external
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; CHECK: HINT 34
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; CHECK: RET
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$w0 = ORRWrs $wzr, $wzr, 0
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RET undef $lr, implicit killed $w0
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---
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# Internal function, not address-taken in this module, so no BTI needed.
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name: simple_internal
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: simple_internal
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; CHECK-NOT: HINT
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; CHECK: RET
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$w0 = ORRWrs $wzr, $wzr, 0
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RET undef $lr, implicit killed $w0
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---
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# Function starts with PACIASP, which implicitly acts as BTI JC, so no change
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# needed.
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name: ptr_auth
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.0.entry:
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liveins: $lr
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; CHECK-LABEL: name: ptr_auth
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; CHECK-NOT: HINT
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; CHECK: frame-setup PACIASP
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; CHECK-NOT: HINT
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; CHECK: RETAA
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frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
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early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store 8 into %stack.0)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $lr
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$w0 = ORRWrs $wzr, $wzr, 0
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early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load 8 from %stack.0)
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RETAA implicit $sp, implicit $lr, implicit killed $w0
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---
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# Function starts with PACIBSP, which implicitly acts as BTI JC, so no change
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# needed.
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name: ptr_auth_b
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.0.entry:
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liveins: $lr
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; CHECK-LABEL: name: ptr_auth_b
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; CHECK-NOT: HINT
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; CHECK: frame-setup PACIBSP
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; CHECK-NOT: HINT
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; CHECK: RETAB
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frame-setup PACIBSP implicit-def $lr, implicit killed $lr, implicit $sp
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early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store 8 into %stack.0)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $lr
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$w0 = ORRWrs $wzr, $wzr, 0
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early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load 8 from %stack.0)
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RETAB implicit $sp, implicit $lr, implicit killed $w0
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---
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# Function contains a jump table, so every target of the jump table must start
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# with BTI J.
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name: jump_table
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jumpTable:
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kind: block-address
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entries:
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- id: 0
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blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6' ]
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: jump_table
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; CHECK: HINT 34
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successors: %bb.7(0x15555555), %bb.1(0x6aaaaaab)
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liveins: $w0
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renamable $w8 = SUBWri killed renamable $w0, 1, 0, implicit-def $x8
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dead $wzr = SUBSWri renamable $w8, 4, 0, implicit-def $nzcv
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Bcc 8, %bb.7, implicit $nzcv
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bb.1.entry:
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; CHECK: bb.1.entry:
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; CHECK-NOT: HINT
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; CHECK: BR killed renamable $x8
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successors: %bb.2(0x1999999a), %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a)
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liveins: $x8
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$x9 = ADRP target-flags(aarch64-page) %jump-table.0
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renamable $x9 = ADDXri killed $x9, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0, 0
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renamable $x8 = LDRXroX killed renamable $x9, killed renamable $x8, 0, 1 :: (load 8 from jump-table)
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BR killed renamable $x8
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bb.2.sw.bb:
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; CHECK: bb.2.sw.bb
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; CHECK-NEXT: HINT 36
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$w0 = ORRWrs $wzr, $wzr, 0
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INLINEASM &"", 1
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RET undef $lr, implicit killed $w0
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bb.3.sw.bb1:
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; CHECK: bb.3.sw.bb1
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; CHECK-NEXT: HINT 36
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$w0 = ORRWrs $wzr, $wzr, 0
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INLINEASM &"", 1
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RET undef $lr, implicit killed $w0
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bb.4.sw.bb2:
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; CHECK: bb.4.sw.bb2
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; CHECK-NEXT: HINT 36
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$w0 = ORRWrs $wzr, $wzr, 0
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INLINEASM &"", 1
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RET undef $lr, implicit killed $w0
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bb.5.sw.bb3:
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; CHECK: bb.5.sw.bb3
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; CHECK-NEXT: HINT 36
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$w0 = ORRWrs $wzr, $wzr, 0
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INLINEASM &"", 1
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RET undef $lr, implicit killed $w0
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bb.6.sw.bb4:
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; CHECK: bb.6.sw.bb4
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; CHECK-NEXT: successors: %bb.7(0x80000000)
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; CHECK-NEXT: {{ }}
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; CHECK-NEXT: HINT 36
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successors: %bb.7(0x80000000)
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INLINEASM &"", 1
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bb.7.sw.epilog:
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; CHECK: bb.7.sw.epilog:
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; CHECK-NOT: HINT
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; CHECK: RET
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$w0 = ORRWrs $wzr, $wzr, 0
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RET undef $lr, implicit killed $w0
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---
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# Function takes address of basic blocks, so they must start with BTI J.
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name: label_address
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body: |
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bb.0.entry:
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; CHECK-LABEL: label_address
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; CHECK: bb.0.entry:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: {{ }}
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; CHECK-NEXT: HINT 34
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; CHECK: BR killed renamable $x9
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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renamable $x8 = ADRP target-flags(aarch64-page) @label_address.addr
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renamable $x9 = LDRXui renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (dereferenceable load 8 from @label_address.addr)
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BR killed renamable $x9
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bb.1.return (address-taken):
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; CHECK: bb.1.return (address-taken):
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; CHECK-NEXT: HINT 36
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liveins: $x8
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$x9 = ADRP target-flags(aarch64-page) blockaddress(@label_address, %ir-block.lab2)
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renamable $w0 = ORRWri $wzr, 0
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renamable $x9 = ADDXri killed $x9, target-flags(aarch64-pageoff, aarch64-nc) blockaddress(@label_address, %ir-block.lab2), 0
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (store 8 into @label_address.addr)
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RET undef $lr, implicit killed $w0
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bb.2.lab2 (address-taken):
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; CHECK: bb.2.lab2 (address-taken):
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; CHECK-NEXT: HINT 36
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liveins: $x8
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$x9 = ADRP target-flags(aarch64-page) blockaddress(@label_address, %ir-block.return)
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renamable $w0 = ORRWri $wzr, 1984
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renamable $x9 = ADDXri killed $x9, target-flags(aarch64-pageoff, aarch64-nc) blockaddress(@label_address, %ir-block.return), 0
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (store 8 into @label_address.addr)
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RET undef $lr, implicit killed $w0
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---
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# Function takes address of the entry block, so the entry block needs a BTI JC.
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name: label_address_entry
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.0.entry (address-taken):
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; CHECK-LABEL: label_address_entry
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; CHECK: bb.0.entry (address-taken):
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: {{ }}
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; CHECK-NEXT: HINT 38
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; CHECK: BR killed renamable $x9
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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renamable $x8 = ADRP target-flags(aarch64-page) @label_address.addr
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renamable $x9 = LDRXui renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (dereferenceable load 8 from @label_address.addr)
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BR killed renamable $x9
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bb.1.return (address-taken):
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; CHECK: bb.1.return (address-taken):
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; CHECK-NEXT: HINT 36
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liveins: $x8
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frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
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frame-setup CFI_INSTRUCTION negate_ra_sign_state
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early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store 8 into %stack.0)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $lr
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$x9 = ADRP target-flags(aarch64-page) blockaddress(@label_address, %ir-block.entry)
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renamable $w0 = ORRWri $wzr, 0
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renamable $x9 = ADDXri killed $x9, target-flags(aarch64-pageoff, aarch64-nc) blockaddress(@label_address, %ir-block.entry), 0
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (store 8 into @label_address.addr)
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early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load 8 from %stack.0)
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|
|
RETAA implicit $sp, implicit $lr, implicit killed $w0
|
||
|
|
|
||
|
|
bb.2.lab2:
|
||
|
|
; CHECK: bb.2.lab2:
|
||
|
|
; CHECK-NOT: HINT
|
||
|
|
liveins: $x8
|
||
|
|
|
||
|
|
$x9 = ADRP target-flags(aarch64-page) blockaddress(@label_address, %ir-block.return)
|
||
|
|
renamable $w0 = ORRWri $wzr, 1984
|
||
|
|
renamable $x9 = ADDXri killed $x9, target-flags(aarch64-pageoff, aarch64-nc) blockaddress(@label_address, %ir-block.return), 0
|
||
|
|
STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @label_address.addr :: (store 8 into @label_address.addr)
|
||
|
|
RET undef $lr, implicit killed $w0
|
||
|
|
---
|
||
|
|
# When PACIASP is the first real instruction in the functions then BTI should not be inserted.
|
||
|
|
name: debug_ptr_auth
|
||
|
|
stack:
|
||
|
|
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
|
||
|
|
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
|
||
|
|
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||
|
|
body: |
|
||
|
|
bb.0.entry:
|
||
|
|
liveins: $lr
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: debug_ptr_auth
|
||
|
|
; CHECK-NOT: HINT
|
||
|
|
; CHECK: frame-setup PACIASP
|
||
|
|
; CHECK-NOT: HINT
|
||
|
|
; CHECK: RETAA
|
||
|
|
frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||
|
|
frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||
|
|
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store 8 into %stack.0)
|
||
|
|
INLINEASM &"", 1, 12, implicit-def dead early-clobber $lr
|
||
|
|
$w0 = ORRWrs $wzr, $wzr, 0
|
||
|
|
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load 8 from %stack.0)
|
||
|
|
RETAA implicit $sp, implicit $lr, implicit killed $w0
|
||
|
|
|
||
|
|
...
|