llvm-for-llvmta/test/CodeGen/AArch64/machine-outliner-regsave.mir

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2022-04-25 10:02:23 +02:00
# RUN: llc -mtriple=aarch64-apple-darwin -run-pass=prologepilog \
# RUN: -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
# Check that we save LR to a callee-saved register when possible.
# foo() should use a callee-saved register. However, bar() should not.
--- |
define void @foo() #0 {
ret void
}
define void @bar() #0 {
ret void
}
attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
...
---
# Make sure that when we outline and a register is available, we
# use it to save + restore LR instead of SP.
# Also make sure that we can call functions that require no save as the same
# outlined function.
# CHECK: name: foo
# CHECK-DAG: bb.1
# CHECK-DAG: $x[[REG:[0-9]+]] = ORRXrs $xzr, $lr, 0
# CHECK-NEXT: BL
# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
# CHECK-DAG: bb.2
# CHECK-DAG: $x[[REG]] = ORRXrs $xzr, $lr, 0
# CHECK-NEXT: BL
# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
# CHECK-DAG: bb.3
# CHECK-DAG: $x[[REG]] = ORRXrs $xzr, $lr, 0
# CHECK-NEXT: BL
# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
# CHECK-DAG: bb.4
# CHECK-NOT: $x[[REG]] = ORRXrs $xzr, $lr, 0
# CHECK-DAG: BL
name: foo
tracksRegLiveness: true
fixedStack:
body: |
bb.0:
$x9 = ORRXri $xzr, 1
$lr = ORRXri $xzr, 1
bb.1:
liveins: $lr, $w9
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 2
bb.2:
liveins: $lr, $w9
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 2
bb.3:
liveins: $lr, $w9
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 2
bb.4:
liveins: $lr, $w9
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 1
$w9 = ORRWri $wzr, 2
bb.5:
liveins: $w9
RET undef $lr
...
---
# Convoluted case that shows that we'll still save to the stack when there are
# no approprate registers available.
# The live-in lists do not contain x16 or x17 since including them would cause
# nothing to be outlined.
# They also deliberately don't contain x18 to show that on Darwin we won't store
# to that.
# CHECK-LABEL: name: bar
# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
# CHECK-NEXT: BL
# CHECK-DAG: early-clobber $sp, $lr = LDRXpost $sp, 16
# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
# CHECK-NEXT: BL
# CHECK-DAG: early-clobber $sp, $lr = LDRXpost $sp, 16
# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
# CHECK-NEXT: BL
# CHECK-NEXT: early-clobber $sp, $lr = LDRXpost $sp, 16
name: bar
tracksRegLiveness: true
body: |
bb.0:
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
$lr = ORRXri $xzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w12 = ORRWri $wzr, 2
bb.1:
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w12 = ORRWri $wzr, 2
bb.2:
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w10 = ORRWri $wzr, 1
$w12 = ORRWri $wzr, 2
bb.3:
liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
RET undef $lr