98 lines
3.7 KiB
LLVM
98 lines
3.7 KiB
LLVM
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
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; This test checks that pmull2 instruction is used for vmull_high_p64 intrinsic.
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; There are two extraction operations located in different basic blocks:
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;
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; %4 = extractelement <2 x i64> %0, i32 1
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; %12 = extractelement <2 x i64> %9, i32 1
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;
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; They are used by:
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;
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; @llvm.aarch64.neon.pmull64(i64 %12, i64 %4) #2
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;
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; We test that pattern replacing llvm.aarch64.neon.pmull64 with pmull2
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; would be applied.
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; IR for that test was generated from the following .cpp file:
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;
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; #include <arm_neon.h>
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;
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; struct SS {
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; uint64x2_t x, h;
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; };
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;
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; void func (SS *g, unsigned int count, const unsigned char *buf, poly128_t* res )
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; {
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; const uint64x2_t x = g->x;
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; const uint64x2_t h = g->h;
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; uint64x2_t ci = g->x;
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;
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; for (int i = 0; i < count; i+=2, buf += 16) {
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; ci = vreinterpretq_u64_u8(veorq_u8(vreinterpretq_u8_u64(ci),
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; vrbitq_u8(vld1q_u8(buf))));
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; res[i] = vmull_p64((poly64_t)vget_low_p64(vreinterpretq_p64_u64(ci)),
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; (poly64_t)vget_low_p64(vreinterpretq_p64_u64(h)));
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; res[i+1] = vmull_high_p64(vreinterpretq_p64_u64(ci),
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; vreinterpretq_p64_u64(h));
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; }
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; }
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;CHECK_LABEL: func:
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;CHECK: pmull2
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%struct.SS = type { <2 x i64>, <2 x i64> }
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; Function Attrs: nofree noinline nounwind
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define dso_local void @_Z4funcP2SSjPKhPo(%struct.SS* nocapture readonly %g, i32 %count, i8* nocapture readonly %buf, i128* nocapture %res) local_unnamed_addr #0 {
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entry:
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%h2 = getelementptr inbounds %struct.SS, %struct.SS* %g, i64 0, i32 1
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%0 = load <2 x i64>, <2 x i64>* %h2, align 16
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%cmp34 = icmp eq i32 %count, 0
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br i1 %cmp34, label %for.cond.cleanup, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%1 = bitcast %struct.SS* %g to <16 x i8>*
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%2 = load <16 x i8>, <16 x i8>* %1, align 16
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%3 = extractelement <2 x i64> %0, i32 0
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%4 = extractelement <2 x i64> %0, i32 1
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%5 = zext i32 %count to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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ret void
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for.body: ; preds = %for.body.lr.ph, %for.body
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%buf.addr.036 = phi i8* [ %buf, %for.body.lr.ph ], [ %add.ptr, %for.body ]
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%6 = phi <16 x i8> [ %2, %for.body.lr.ph ], [ %xor.i, %for.body ]
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%7 = bitcast i8* %buf.addr.036 to <16 x i8>*
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%8 = load <16 x i8>, <16 x i8>* %7, align 16
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%vrbit.i = call <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8> %8) #0
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%xor.i = xor <16 x i8> %vrbit.i, %6
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%9 = bitcast <16 x i8> %xor.i to <2 x i64>
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%10 = extractelement <2 x i64> %9, i32 0
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%vmull_p64.i = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %10, i64 %3) #0
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%arrayidx = getelementptr inbounds i128, i128* %res, i64 %indvars.iv
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%11 = bitcast i128* %arrayidx to <16 x i8>*
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store <16 x i8> %vmull_p64.i, <16 x i8>* %11, align 16
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%12 = extractelement <2 x i64> %9, i32 1
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%vmull_p64.i.i = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %12, i64 %4) #0
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%13 = or i64 %indvars.iv, 1
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%arrayidx16 = getelementptr inbounds i128, i128* %res, i64 %13
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%14 = bitcast i128* %arrayidx16 to <16 x i8>*
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store <16 x i8> %vmull_p64.i.i, <16 x i8>* %14, align 16
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
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%add.ptr = getelementptr inbounds i8, i8* %buf.addr.036, i64 16
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%cmp = icmp ult i64 %indvars.iv.next, %5
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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}
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; Function Attrs: nounwind readnone
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declare <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8>) #0
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; Function Attrs: nounwind readnone
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declare <16 x i8> @llvm.aarch64.neon.pmull64(i64, i64) #0
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attributes #0 = { nofree noinline nounwind }
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