58 lines
2.4 KiB
LLVM
58 lines
2.4 KiB
LLVM
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; RUN: llc -march=amdgcn -verify-machineinstrs -mtriple=amdgcn-- -o - %s | FileCheck %s
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declare float @llvm.fma.f32(float, float, float)
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; This checks that rematerialization support of the coalescer does not
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; unnecessarily widen the register class. Without those fixes > 20 VGprs
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; are used here
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; Also check that some rematerialization of the 0 constant happened.
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; CHECK-LABEL: foobar
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; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0
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; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0
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; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0
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; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0
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; It's probably OK if this is slightly higher:
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; CHECK: ; NumVgprs: 4
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define amdgpu_kernel void @foobar(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in, i32 %flag) {
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entry:
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%cmpflag = icmp eq i32 %flag, 1
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br i1 %cmpflag, label %loop, label %exit
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loop:
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%c = phi i32 [0, %entry], [%cnext, %loop]
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%v0 = phi float [0.0, %entry], [%fma.0, %loop]
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%v1 = phi float [0.0, %entry], [%fma.1, %loop]
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%v2 = phi float [0.0, %entry], [%fma.2, %loop]
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%v3 = phi float [0.0, %entry], [%fma.3, %loop]
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; Try to get the 0 constant to get coalesced into a wide register
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%blup = insertelement <4 x float> undef, float %v0, i32 0
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store <4 x float> %blup, <4 x float> addrspace(1)* %out
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%load = load <4 x float>, <4 x float> addrspace(1)* %in
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%load.0 = extractelement <4 x float> %load, i32 0
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%load.1 = extractelement <4 x float> %load, i32 1
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%load.2 = extractelement <4 x float> %load, i32 2
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%load.3 = extractelement <4 x float> %load, i32 3
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%fma.0 = call float @llvm.fma.f32(float %v0, float %load.0, float %v0)
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%fma.1 = call float @llvm.fma.f32(float %v1, float %load.1, float %v1)
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%fma.2 = call float @llvm.fma.f32(float %v2, float %load.2, float %v2)
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%fma.3 = call float @llvm.fma.f32(float %v3, float %load.3, float %v3)
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%cnext = add nsw i32 %c, 1
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%cmp = icmp eq i32 %cnext, 42
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br i1 %cmp, label %exit, label %loop
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exit:
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%ev0 = phi float [0.0, %entry], [%fma.0, %loop]
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%ev1 = phi float [0.0, %entry], [%fma.1, %loop]
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%ev2 = phi float [0.0, %entry], [%fma.2, %loop]
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%ev3 = phi float [0.0, %entry], [%fma.3, %loop]
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%dst.0 = insertelement <4 x float> undef, float %ev0, i32 0
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%dst.1 = insertelement <4 x float> %dst.0, float %ev1, i32 1
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%dst.2 = insertelement <4 x float> %dst.1, float %ev2, i32 2
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%dst.3 = insertelement <4 x float> %dst.2, float %ev3, i32 3
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store <4 x float> %dst.3, <4 x float> addrspace(1)* %out
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ret void
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}
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