434 lines
14 KiB
LLVM
434 lines
14 KiB
LLVM
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=GCN-NOHSA -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=GCN-HSA -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=GCN-NOHSA -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=GCN-HSA -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=GCN-HSA -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}constant_load_i32:
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; GCN: s_load_dword s{{[0-9]+}}
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; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
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define amdgpu_kernel void @constant_load_i32(i32 addrspace(1)* %out, i32 addrspace(4)* %in) #0 {
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entry:
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%ld = load i32, i32 addrspace(4)* %in
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store i32 %ld, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_load_v2i32:
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; GCN: s_load_dwordx2
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; EG: VTX_READ_64
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define amdgpu_kernel void @constant_load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(4)* %in) #0 {
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entry:
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%ld = load <2 x i32>, <2 x i32> addrspace(4)* %in
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store <2 x i32> %ld, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_load_v3i32:
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; GCN: s_load_dwordx4
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; EG: VTX_READ_128
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define amdgpu_kernel void @constant_load_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(4)* %in) #0 {
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entry:
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%ld = load <3 x i32>, <3 x i32> addrspace(4)* %in
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store <3 x i32> %ld, <3 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_load_v4i32:
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; GCN: s_load_dwordx4
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; EG: VTX_READ_128
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define amdgpu_kernel void @constant_load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(4)* %in) #0 {
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entry:
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%ld = load <4 x i32>, <4 x i32> addrspace(4)* %in
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store <4 x i32> %ld, <4 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_load_v8i32:
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; GCN: s_load_dwordx8
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @constant_load_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(4)* %in) #0 {
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entry:
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%ld = load <8 x i32>, <8 x i32> addrspace(4)* %in
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store <8 x i32> %ld, <8 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_load_v16i32:
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; GCN: s_load_dwordx16
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @constant_load_v16i32(<16 x i32> addrspace(1)* %out, <16 x i32> addrspace(4)* %in) #0 {
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entry:
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%ld = load <16 x i32>, <16 x i32> addrspace(4)* %in
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store <16 x i32> %ld, <16 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_i32_to_i64:
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; GCN-DAG: s_load_dword s[[SLO:[0-9]+]],
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; GCN-DAG: v_mov_b32_e32 v[[SHI:[0-9]+]], 0{{$}}
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; GCN: store_dwordx2
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; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG: CF_END
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; EG: VTX_READ_32
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define amdgpu_kernel void @constant_zextload_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(4)* %in) #0 {
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%ld = load i32, i32 addrspace(4)* %in
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%ext = zext i32 %ld to i64
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store i64 %ext, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_i32_to_i64:
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; GCN: s_load_dword s[[SLO:[0-9]+]]
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; GCN: s_ashr_i32 s[[HI:[0-9]+]], s[[SLO]], 31
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; GCN: store_dwordx2
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; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG: CF_END
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; EG: VTX_READ_32
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; EG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.
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; EG: 31
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define amdgpu_kernel void @constant_sextload_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(4)* %in) #0 {
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%ld = load i32, i32 addrspace(4)* %in
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%ext = sext i32 %ld to i64
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store i64 %ext, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_v1i32_to_v1i64:
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; GCN: s_load_dword
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; GCN: store_dwordx2
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define amdgpu_kernel void @constant_zextload_v1i32_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i32> addrspace(4)* %in) #0 {
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%ld = load <1 x i32>, <1 x i32> addrspace(4)* %in
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%ext = zext <1 x i32> %ld to <1 x i64>
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store <1 x i64> %ext, <1 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_v1i32_to_v1i64:
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; GCN: s_load_dword s[[LO:[0-9]+]]
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; GCN: s_ashr_i32 s[[HI:[0-9]+]], s[[LO]], 31
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; GCN: store_dwordx2
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define amdgpu_kernel void @constant_sextload_v1i32_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i32> addrspace(4)* %in) #0 {
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%ld = load <1 x i32>, <1 x i32> addrspace(4)* %in
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%ext = sext <1 x i32> %ld to <1 x i64>
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store <1 x i64> %ext, <1 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_v2i32_to_v2i64:
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; GCN: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x0{{$}}
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; GCN: store_dwordx4
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define amdgpu_kernel void @constant_zextload_v2i32_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i32> addrspace(4)* %in) #0 {
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%ld = load <2 x i32>, <2 x i32> addrspace(4)* %in
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%ext = zext <2 x i32> %ld to <2 x i64>
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store <2 x i64> %ext, <2 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_v2i32_to_v2i64:
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; GCN: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x0{{$}}
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; GCN-DAG: s_ashr_i32
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; GCN-DAG: s_ashr_i32
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; GCN: store_dwordx4
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define amdgpu_kernel void @constant_sextload_v2i32_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i32> addrspace(4)* %in) #0 {
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%ld = load <2 x i32>, <2 x i32> addrspace(4)* %in
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%ext = sext <2 x i32> %ld to <2 x i64>
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store <2 x i64> %ext, <2 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_v4i32_to_v4i64:
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; GCN: s_load_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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define amdgpu_kernel void @constant_zextload_v4i32_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i32> addrspace(4)* %in) #0 {
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%ld = load <4 x i32>, <4 x i32> addrspace(4)* %in
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%ext = zext <4 x i32> %ld to <4 x i64>
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store <4 x i64> %ext, <4 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_v4i32_to_v4i64:
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; GCN: s_load_dwordx4
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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define amdgpu_kernel void @constant_sextload_v4i32_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i32> addrspace(4)* %in) #0 {
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%ld = load <4 x i32>, <4 x i32> addrspace(4)* %in
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%ext = sext <4 x i32> %ld to <4 x i64>
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store <4 x i64> %ext, <4 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_v8i32_to_v8i64:
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; GCN: s_load_dwordx8
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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; GCN-SA-DAG: {{flat|global}}_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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define amdgpu_kernel void @constant_zextload_v8i32_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i32> addrspace(4)* %in) #0 {
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%ld = load <8 x i32>, <8 x i32> addrspace(4)* %in
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%ext = zext <8 x i32> %ld to <8 x i64>
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store <8 x i64> %ext, <8 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_v8i32_to_v8i64:
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; GCN: s_load_dwordx8
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN: s_ashr_i32
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-NOHSA-DAG: buffer_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
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define amdgpu_kernel void @constant_sextload_v8i32_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i32> addrspace(4)* %in) #0 {
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%ld = load <8 x i32>, <8 x i32> addrspace(4)* %in
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%ext = sext <8 x i32> %ld to <8 x i64>
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store <8 x i64> %ext, <8 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_sextload_v16i32_to_v16i64:
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; GCN: s_load_dwordx16
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; GCN-DAG: s_ashr_i32
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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; GCN: store_dwordx4
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define amdgpu_kernel void @constant_sextload_v16i32_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i32> addrspace(4)* %in) #0 {
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%ld = load <16 x i32>, <16 x i32> addrspace(4)* %in
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%ext = sext <16 x i32> %ld to <16 x i64>
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store <16 x i64> %ext, <16 x i64> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}constant_zextload_v16i32_to_v16i64
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; GCN: s_load_dwordx16
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-NOHSA: buffer_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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; GCN-HSA: {{flat|global}}_store_dwordx4
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define amdgpu_kernel void @constant_zextload_v16i32_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i32> addrspace(4)* %in) #0 {
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%ld = load <16 x i32>, <16 x i32> addrspace(4)* %in
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%ext = zext <16 x i32> %ld to <16 x i64>
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store <16 x i64> %ext, <16 x i64> addrspace(1)* %out
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|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; FUNC-LABEL: {{^}}constant_sextload_v32i32_to_v32i64:
|
||
|
|
|
||
|
|
; GCN: s_load_dwordx16
|
||
|
|
; GCN-DAG: s_load_dwordx16
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i32> addrspace(4)* %in) #0 {
|
||
|
|
%ld = load <32 x i32>, <32 x i32> addrspace(4)* %in
|
||
|
|
%ext = sext <32 x i32> %ld to <32 x i64>
|
||
|
|
store <32 x i64> %ext, <32 x i64> addrspace(1)* %out
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; FUNC-LABEL: {{^}}constant_zextload_v32i32_to_v32i64:
|
||
|
|
; GCN: s_load_dwordx16
|
||
|
|
; GCN: s_load_dwordx16
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
define amdgpu_kernel void @constant_zextload_v32i32_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i32> addrspace(4)* %in) #0 {
|
||
|
|
%ld = load <32 x i32>, <32 x i32> addrspace(4)* %in
|
||
|
|
%ext = zext <32 x i32> %ld to <32 x i64>
|
||
|
|
store <32 x i64> %ext, <32 x i64> addrspace(1)* %out
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; FUNC-LABEL: {{^}}constant_load_v32i32:
|
||
|
|
; GCN: s_load_dwordx16
|
||
|
|
; GCN: s_load_dwordx16
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
; GCN-NOHSA-DAG: buffer_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-NOT: accvgpr
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
; GCN-HSA-DAG: {{flat|global}}_store_dwordx4
|
||
|
|
define amdgpu_kernel void @constant_load_v32i32(<32 x i32> addrspace(1)* %out, <32 x i32> addrspace(4)* %in) #0 {
|
||
|
|
%ld = load <32 x i32>, <32 x i32> addrspace(4)* %in
|
||
|
|
store <32 x i32> %ld, <32 x i32> addrspace(1)* %out
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
attributes #0 = { nounwind }
|