52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv67t < %s | FileCheck %s
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; RUN: llc -march=hexagon -mcpu=hexagonv65 < %s | FileCheck --check-prefix=CHECK-BIG %s
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; Test that the tiny core architecture generates 3 slot packets at most and
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; a single load/store per packet at most.
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; CHECK: loop0(.LBB0_[[LOOP:.]],
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; CHECK: .LBB0_[[LOOP]]:
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; CHECK: {
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; CHECK-NEXT: mpy
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; CHECK-NEXT: combine
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; CHECK-NEXT: memw
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; CHECK-NEXT: }
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; CHECK: memw
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; CHECK: } :endloop0
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; Test the loop contains a single packet with 4 instructions.
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; CHECK-BIG: loop0(.LBB0_[[LOOP:.]],
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; CHECK-BIG: .LBB0_[[LOOP]]:
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; CHECK-BIG: {
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; CHECK-BIG: += mpyi
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; CHECK-BIG-NEXT: = combine
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; CHECK-BIG-NEXT: = memw
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; CHECK-BIG-NEXT: = memw
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; CHECK-BIG-NEXT: } :endloop0
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define i32 @test(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32 %n) local_unnamed_addr #0 {
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entry:
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%cmp8 = icmp sgt i32 %n, 0
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br i1 %cmp8, label %for.body, label %for.end
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for.body:
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%sum.010 = phi i32 [ %add, %for.body ], [ 0, %entry ]
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%arrayidx.phi = phi i32* [ %arrayidx.inc, %for.body ], [ %a, %entry ]
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%arrayidx1.phi = phi i32* [ %arrayidx1.inc, %for.body ], [ %b, %entry ]
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%i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%0 = load i32, i32* %arrayidx.phi, align 4
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%1 = load i32, i32* %arrayidx1.phi, align 4
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%mul = mul nsw i32 %1, %0
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%add = add nsw i32 %mul, %sum.010
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%inc = add nuw nsw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %n
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%arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1
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%arrayidx1.inc = getelementptr i32, i32* %arrayidx1.phi, i32 1
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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%sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
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ret i32 %sum.0.lcssa
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}
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