179 lines
6.5 KiB
LLVM
179 lines
6.5 KiB
LLVM
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; FIXME: Even under non-pic mode, llvm for ve needs to generate pic code since
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; nld doesn't work with non-pic code. Thefore, we test only pic codes
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; for both cases here.
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; llc -filetype=obj -mtriple=ve -o - %s | llvm-objdump - -d -r \
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; | FileCheck %s -check-prefix=LOCAL
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; RUN: llc -filetype=obj -mtriple=ve -o - %s | llvm-objdump - -d -r \
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; RUN: | FileCheck %s -check-prefix=GENDYN
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; RUN: llc -filetype=obj -mtriple=ve -relocation-model=pic -o - %s \
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; RUN: | llvm-objdump - -d -r | FileCheck %s -check-prefix=GENDYNPIC
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@x = external thread_local global i32, align 4
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@y = internal thread_local global i32 0, align 4
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; Function Attrs: norecurse nounwind readnone
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define nonnull i32* @get_global() {
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; GENDYN: lea %s0, (-24)
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; GENDYN-NEXT: R_VE_TLS_GD_LO32 x
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; GENDYN-NEXT: and %s0, %s0, (32)0
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; GENDYN-NEXT: sic %s10
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; GENDYN-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYN-NEXT: R_VE_TLS_GD_HI32 x
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; GENDYN-NEXT: lea %s12, (8)
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; GENDYN-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYN-NEXT: and %s12, %s12, (32)0
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; GENDYN-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYN-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYN-NEXT: bsic %s10, (, %s12)
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; GENDYN-NEXT: or %s11, 0, %s9
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;
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; GENDYNPIC: lea %s15, (-24)
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; GENDYNPIC-NEXT: R_VE_PC_LO32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: and %s15, %s15, (32)0
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; GENDYNPIC-NEXT: sic %s16
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; GENDYNPIC-NEXT: lea.sl %s15, (%s16, %s15)
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; GENDYNPIC-NEXT: R_VE_PC_HI32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: lea %s0, (-24)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_LO32 x
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; GENDYNPIC-NEXT: and %s0, %s0, (32)0
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; GENDYNPIC-NEXT: sic %s10
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; GENDYNPIC-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_HI32 x
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; GENDYNPIC-NEXT: lea %s12, (8)
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; GENDYNPIC-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYNPIC-NEXT: and %s12, %s12, (32)0
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; GENDYNPIC-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYNPIC-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYNPIC-NEXT: bsic %s10, (, %s12)
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; GENDYNPIC-NEXT: or %s11, 0, %s9
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entry:
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ret i32* @x
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}
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; Function Attrs: norecurse nounwind readnone
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define nonnull i32* @get_local() {
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; GENDYN: lea %s0, (-24)
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; GENDYN-NEXT: R_VE_TLS_GD_LO32 y
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; GENDYN-NEXT: and %s0, %s0, (32)0
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; GENDYN-NEXT: sic %s10
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; GENDYN-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYN-NEXT: R_VE_TLS_GD_HI32 y
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; GENDYN-NEXT: lea %s12, (8)
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; GENDYN-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYN-NEXT: and %s12, %s12, (32)0
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; GENDYN-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYN-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYN-NEXT: bsic %s10, (, %s12)
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; GENDYN-NEXT: or %s11, 0, %s9
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;
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; GENDYNPIC: lea %s15, (-24)
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; GENDYNPIC-NEXT: R_VE_PC_LO32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: and %s15, %s15, (32)0
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; GENDYNPIC-NEXT: sic %s16
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; GENDYNPIC-NEXT: lea.sl %s15, (%s16, %s15)
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; GENDYNPIC-NEXT: R_VE_PC_HI32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: lea %s0, (-24)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_LO32 y
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; GENDYNPIC-NEXT: and %s0, %s0, (32)0
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; GENDYNPIC-NEXT: sic %s10
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; GENDYNPIC-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_HI32 y
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; GENDYNPIC-NEXT: lea %s12, (8)
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; GENDYNPIC-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYNPIC-NEXT: and %s12, %s12, (32)0
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; GENDYNPIC-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYNPIC-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYNPIC-NEXT: bsic %s10, (, %s12)
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; GENDYNPIC-NEXT: or %s11, 0, %s9
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entry:
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ret i32* @y
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}
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; Function Attrs: norecurse nounwind
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define void @set_global(i32 %v) {
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; GENDYN: lea %s0, (-24)
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; GENDYN-NEXT: R_VE_TLS_GD_LO32 x
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; GENDYN-NEXT: and %s0, %s0, (32)0
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; GENDYN-NEXT: sic %s10
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; GENDYN-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYN-NEXT: R_VE_TLS_GD_HI32 x
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; GENDYN-NEXT: lea %s12, (8)
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; GENDYN-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYN-NEXT: and %s12, %s12, (32)0
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; GENDYN-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYN-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYN-NEXT: bsic %s10, (, %s12)
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; GENDYN-NEXT: stl %s18, (, %s0)
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; GENDYN-NEXT: ld %s18, 288(, %s11)
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; GENDYN-NEXT: or %s11, 0, %s9
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;
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; GENDYNPIC: lea %s15, (-24)
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; GENDYNPIC-NEXT: R_VE_PC_LO32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: and %s15, %s15, (32)0
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; GENDYNPIC-NEXT: sic %s16
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; GENDYNPIC-NEXT: lea.sl %s15, (%s16, %s15)
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; GENDYNPIC-NEXT: R_VE_PC_HI32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: lea %s0, (-24)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_LO32 x
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; GENDYNPIC-NEXT: and %s0, %s0, (32)0
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; GENDYNPIC-NEXT: sic %s10
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; GENDYNPIC-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_HI32 x
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; GENDYNPIC-NEXT: lea %s12, (8)
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; GENDYNPIC-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYNPIC-NEXT: and %s12, %s12, (32)0
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; GENDYNPIC-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYNPIC-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYNPIC-NEXT: bsic %s10, (, %s12)
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; GENDYNPIC-NEXT: stl %s18, (, %s0)
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; GENDYNPIC-NEXT: ld %s18, 288(, %s11)
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; GENDYNPIC-NEXT: or %s11, 0, %s9
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entry:
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store i32 %v, i32* @x, align 4
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @set_local(i32 %v) {
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; GENDYN: lea %s0, (-24)
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; GENDYN-NEXT: R_VE_TLS_GD_LO32 y
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; GENDYN-NEXT: and %s0, %s0, (32)0
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; GENDYN-NEXT: sic %s10
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; GENDYN-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYN-NEXT: R_VE_TLS_GD_HI32 y
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; GENDYN-NEXT: lea %s12, (8)
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; GENDYN-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYN-NEXT: and %s12, %s12, (32)0
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; GENDYN-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYN-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYN-NEXT: bsic %s10, (, %s12)
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; GENDYN-NEXT: stl %s18, (, %s0)
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; GENDYN-NEXT: ld %s18, 288(, %s11)
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; GENDYN-NEXT: or %s11, 0, %s9
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;
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; GENDYNPIC: lea %s15, (-24)
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; GENDYNPIC-NEXT: R_VE_PC_LO32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: and %s15, %s15, (32)0
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; GENDYNPIC-NEXT: sic %s16
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; GENDYNPIC-NEXT: lea.sl %s15, (%s16, %s15)
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; GENDYNPIC-NEXT: R_VE_PC_HI32 _GLOBAL_OFFSET_TABLE_
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; GENDYNPIC-NEXT: lea %s0, (-24)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_LO32 y
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; GENDYNPIC-NEXT: and %s0, %s0, (32)0
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; GENDYNPIC-NEXT: sic %s10
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; GENDYNPIC-NEXT: lea.sl %s0, (%s10, %s0)
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; GENDYNPIC-NEXT: R_VE_TLS_GD_HI32 y
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; GENDYNPIC-NEXT: lea %s12, (8)
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; GENDYNPIC-NEXT: R_VE_PLT_LO32 __tls_get_addr
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; GENDYNPIC-NEXT: and %s12, %s12, (32)0
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; GENDYNPIC-NEXT: lea.sl %s12, (%s10, %s12)
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; GENDYNPIC-NEXT: R_VE_PLT_HI32 __tls_get_addr
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; GENDYNPIC-NEXT: bsic %s10, (, %s12)
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; GENDYNPIC-NEXT: stl %s18, (, %s0)
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; GENDYNPIC-NEXT: ld %s18, 288(, %s11)
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; GENDYNPIC-NEXT: or %s11, 0, %s9
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entry:
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store i32 %v, i32* @y, align 4
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ret void
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}
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