llvm-for-llvmta/test/CodeGen/X86/pr47482.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=bmi | FileCheck %s
@a = external dso_local local_unnamed_addr global i32, align 4
@f = external dso_local local_unnamed_addr global i32, align 4
define void @g(i32* %x, i32* %y, i32* %z) {
; CHECK-LABEL: g:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{.*}}(%rip), %eax
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: sete %cl
; CHECK-NEXT: addl %ecx, %ecx
; CHECK-NEXT: orl (%rdi), %ecx
; CHECK-NEXT: movl $0, (%rsi)
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: shll $8, %eax
; CHECK-NEXT: bextrl %eax, {{.*}}(%rip), %eax
; CHECK-NEXT: orl %ecx, %eax
; CHECK-NEXT: movl %eax, (%rdx)
; CHECK-NEXT: retq
entry:
%0 = load i32, i32* @a, align 4
%1 = tail call i32 asm "", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %0)
%2 = icmp eq i32 %1, 0
%shl1 = select i1 %2, i32 2, i32 0
%3 = load i32, i32* %x, align 4
%or = or i32 %3, %shl1
store i32 0, i32* %y, align 4
%4 = tail call i32 asm "", "=r,~{dirflag},~{fpsr},~{flags}"()
%notmask = shl nsw i32 -1, %4
%sub = xor i32 %notmask, -1
%5 = load i32, i32* @f, align 4
%and4 = and i32 %5, %sub
%or6 = or i32 %and4, %or
store i32 %or6, i32* %z, align 4
ret void
}