630 lines
16 KiB
LLVM
630 lines
16 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD
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; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264
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define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: foo:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: roll %cl, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: foo:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edx, %ecx
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK64-NEXT: roll %cl, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = shl i32 %x, %z
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%1 = sub i32 32, %z
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%2 = lshr i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: bar:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: shldl %cl, %edx, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: bar:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edx, %ecx
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; CHECK64-NEXT: movl %esi, %eax
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; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK64-NEXT: shldl %cl, %edi, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = shl i32 %y, %z
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%1 = sub i32 32, %z
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%2 = lshr i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: un:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: rorl %cl, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: un:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edx, %ecx
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK64-NEXT: rorl %cl, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = lshr i32 %x, %z
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%1 = sub i32 32, %z
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%2 = shl i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: bu:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: shrdl %cl, %edx, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: bu:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edx, %ecx
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; CHECK64-NEXT: movl %esi, %eax
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; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK64-NEXT: shrdl %cl, %edi, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = lshr i32 %y, %z
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%1 = sub i32 32, %z
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%2 = shl i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; X86-LABEL: xfoo:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: roll $7, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xfoo:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: shldl $7, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xfoo:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: retl
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;
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; X64-LABEL: xfoo:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: roll $7, %eax
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; X64-NEXT: retq
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;
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; SHLD64-LABEL: xfoo:
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; SHLD64: # %bb.0: # %entry
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; SHLD64-NEXT: movl %edi, %eax
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; SHLD64-NEXT: shldl $7, %eax, %eax
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; SHLD64-NEXT: retq
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;
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; BMI264-LABEL: xfoo:
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; BMI264: # %bb.0: # %entry
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; BMI264-NEXT: rorxl $25, %edi, %eax
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; BMI264-NEXT: retq
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entry:
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%0 = lshr i32 %x, 25
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%1 = shl i32 %x, 7
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xfoop(i32* %p) nounwind readnone {
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; X86-LABEL: xfoop:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: roll $7, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xfoop:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: movl (%eax), %eax
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; SHLD-NEXT: shldl $7, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xfoop:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: rorxl $25, (%eax), %eax
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; BMI2-NEXT: retl
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;
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; X64-LABEL: xfoop:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: roll $7, %eax
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; X64-NEXT: retq
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;
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; SHLD64-LABEL: xfoop:
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; SHLD64: # %bb.0: # %entry
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; SHLD64-NEXT: movl (%rdi), %eax
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; SHLD64-NEXT: shldl $7, %eax, %eax
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; SHLD64-NEXT: retq
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;
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; BMI264-LABEL: xfoop:
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; BMI264: # %bb.0: # %entry
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; BMI264-NEXT: rorxl $25, (%rdi), %eax
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; BMI264-NEXT: retq
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entry:
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%x = load i32, i32* %p
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%a = lshr i32 %x, 25
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%b = shl i32 %x, 7
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%c = or i32 %a, %b
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ret i32 %c
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}
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define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: xbar:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: shldl $7, %ecx, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: xbar:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: shrdl $25, %esi, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = shl i32 %y, 7
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%1 = lshr i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; X86-LABEL: xun:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: roll $25, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xun:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: shldl $25, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xun:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: retl
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;
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; X64-LABEL: xun:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: roll $25, %eax
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; X64-NEXT: retq
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;
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; SHLD64-LABEL: xun:
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; SHLD64: # %bb.0: # %entry
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; SHLD64-NEXT: movl %edi, %eax
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; SHLD64-NEXT: shldl $25, %eax, %eax
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; SHLD64-NEXT: retq
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;
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; BMI264-LABEL: xun:
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; BMI264: # %bb.0: # %entry
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; BMI264-NEXT: rorxl $7, %edi, %eax
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; BMI264-NEXT: retq
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entry:
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%0 = lshr i32 %x, 7
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%1 = shl i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xunp(i32* %p) nounwind readnone {
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; X86-LABEL: xunp:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: roll $25, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xunp:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: movl (%eax), %eax
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; SHLD-NEXT: shldl $25, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xunp:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: rorxl $7, (%eax), %eax
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; BMI2-NEXT: retl
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;
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; X64-LABEL: xunp:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: roll $25, %eax
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; X64-NEXT: retq
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;
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; SHLD64-LABEL: xunp:
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; SHLD64: # %bb.0: # %entry
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; SHLD64-NEXT: movl (%rdi), %eax
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; SHLD64-NEXT: shldl $25, %eax, %eax
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; SHLD64-NEXT: retq
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;
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; BMI264-LABEL: xunp:
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; BMI264: # %bb.0: # %entry
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; BMI264-NEXT: rorxl $7, (%rdi), %eax
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; BMI264-NEXT: retq
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entry:
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; shld-label: xunp:
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; shld: shldl $25
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%x = load i32, i32* %p
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%a = lshr i32 %x, 7
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%b = shl i32 %x, 25
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%c = or i32 %a, %b
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ret i32 %c
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}
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define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; CHECK32-LABEL: xbu:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK32-NEXT: shldl $25, %ecx, %eax
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; CHECK32-NEXT: retl
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;
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; CHECK64-LABEL: xbu:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: shldl $25, %esi, %eax
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; CHECK64-NEXT: retq
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entry:
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%0 = lshr i32 %y, 7
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%1 = shl i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @fshl(i32 %x) nounwind {
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; X86-LABEL: fshl:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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|
|
; X86-NEXT: roll $7, %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshl:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shldl $7, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshl:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshl:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: roll $7, %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshl:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shldl $7, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshl:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $25, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
declare i32 @llvm.fshl.i32(i32, i32, i32)
|
||
|
|
|
||
|
|
define i32 @fshl1(i32 %x) nounwind {
|
||
|
|
; X86-LABEL: fshl1:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: roll %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshl1:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shldl $1, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshl1:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshl1:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: roll %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshl1:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shldl $1, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshl1:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $31, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 1)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @fshl31(i32 %x) nounwind {
|
||
|
|
; X86-LABEL: fshl31:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: rorl %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshl31:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shldl $31, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshl31:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshl31:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: rorl %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshl31:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shldl $31, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshl31:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $1, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 31)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @fshl_load(i32* %p) nounwind {
|
||
|
|
; X86-LABEL: fshl_load:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: movl (%eax), %eax
|
||
|
|
; X86-NEXT: roll $7, %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshl_load:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: movl (%eax), %eax
|
||
|
|
; SHLD-NEXT: shldl $7, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshl_load:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: rorxl $25, (%eax), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshl_load:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl (%rdi), %eax
|
||
|
|
; X64-NEXT: roll $7, %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshl_load:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl (%rdi), %eax
|
||
|
|
; SHLD64-NEXT: shldl $7, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshl_load:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $25, (%rdi), %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%x = load i32, i32* %p
|
||
|
|
%f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @fshr(i32 %x) nounwind {
|
||
|
|
; X86-LABEL: fshr:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: rorl $7, %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshr:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shrdl $7, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshr:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshr:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: rorl $7, %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshr:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shrdl $7, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshr:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $7, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
declare i32 @llvm.fshr.i32(i32, i32, i32)
|
||
|
|
|
||
|
|
define i32 @fshr1(i32 %x) nounwind {
|
||
|
|
; X86-LABEL: fshr1:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: rorl %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshr1:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shrdl $1, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshr1:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshr1:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: rorl %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshr1:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shrdl $1, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshr1:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $1, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 1)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @fshr31(i32 %x) nounwind {
|
||
|
|
; X86-LABEL: fshr31:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: roll %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshr31:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: shrdl $31, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshr31:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshr31:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl %edi, %eax
|
||
|
|
; X64-NEXT: roll %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshr31:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl %edi, %eax
|
||
|
|
; SHLD64-NEXT: shrdl $31, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshr31:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $31, %edi, %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 31)
|
||
|
|
ret i32 %f
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @fshr_load(i32* %p) nounwind {
|
||
|
|
; X86-LABEL: fshr_load:
|
||
|
|
; X86: # %bb.0:
|
||
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; X86-NEXT: movl (%eax), %eax
|
||
|
|
; X86-NEXT: rorl $7, %eax
|
||
|
|
; X86-NEXT: retl
|
||
|
|
;
|
||
|
|
; SHLD-LABEL: fshr_load:
|
||
|
|
; SHLD: # %bb.0:
|
||
|
|
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; SHLD-NEXT: movl (%eax), %eax
|
||
|
|
; SHLD-NEXT: shrdl $7, %eax, %eax
|
||
|
|
; SHLD-NEXT: retl
|
||
|
|
;
|
||
|
|
; BMI2-LABEL: fshr_load:
|
||
|
|
; BMI2: # %bb.0:
|
||
|
|
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||
|
|
; BMI2-NEXT: rorxl $7, (%eax), %eax
|
||
|
|
; BMI2-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-LABEL: fshr_load:
|
||
|
|
; X64: # %bb.0:
|
||
|
|
; X64-NEXT: movl (%rdi), %eax
|
||
|
|
; X64-NEXT: rorl $7, %eax
|
||
|
|
; X64-NEXT: retq
|
||
|
|
;
|
||
|
|
; SHLD64-LABEL: fshr_load:
|
||
|
|
; SHLD64: # %bb.0:
|
||
|
|
; SHLD64-NEXT: movl (%rdi), %eax
|
||
|
|
; SHLD64-NEXT: shrdl $7, %eax, %eax
|
||
|
|
; SHLD64-NEXT: retq
|
||
|
|
;
|
||
|
|
; BMI264-LABEL: fshr_load:
|
||
|
|
; BMI264: # %bb.0:
|
||
|
|
; BMI264-NEXT: rorxl $7, (%rdi), %eax
|
||
|
|
; BMI264-NEXT: retq
|
||
|
|
%x = load i32, i32* %p
|
||
|
|
%f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7)
|
||
|
|
ret i32 %f
|
||
|
|
}
|