100 lines
3.5 KiB
LLVM
100 lines
3.5 KiB
LLVM
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; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=-sse | FileCheck %s -check-prefix=CHECK -check-prefix=NOSSE
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;
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; Verifies that x32 va_start lowering is sane. To regenerate this test, use
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; cat <<EOF |
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; #include <stdarg.h>
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;
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; int foo(float a, const char* fmt, ...) {
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; va_list ap;
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; va_start(ap, fmt);
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; int value = va_arg(ap, int);
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; va_end(ap);
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; return value;
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; }
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; EOF
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; build/bin/clang -mx32 -O3 -o- -S -emit-llvm -xc -
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;
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target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnux32"
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%struct.__va_list_tag = type { i32, i32, i8*, i8* }
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define i32 @foo(float %a, i8* nocapture readnone %fmt, ...) nounwind {
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entry:
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%ap = alloca [1 x %struct.__va_list_tag], align 16
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%0 = bitcast [1 x %struct.__va_list_tag]* %ap to i8*
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call void @llvm.lifetime.start.p0i8(i64 16, i8* %0) #2
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call void @llvm.va_start(i8* %0)
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; SSE: subl $72, %esp
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; SSE: testb %al, %al
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; SSE: je .[[NOFP:.*]]
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; SSE-DAG: movaps %xmm1
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; SSE-DAG: movaps %xmm2
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; SSE-DAG: movaps %xmm3
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; SSE-DAG: movaps %xmm4
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; SSE-DAG: movaps %xmm5
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; SSE-DAG: movaps %xmm6
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; SSE-DAG: movaps %xmm7
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; NOSSE-NOT: xmm
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; SSE: .[[NOFP]]:
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; CHECK-DAG: movq %r9
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; CHECK-DAG: movq %r8
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; CHECK-DAG: movq %rcx
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; CHECK-DAG: movq %rdx
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; CHECK-DAG: movq %rsi
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%gp_offset_p = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0, i32 0
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%gp_offset = load i32, i32* %gp_offset_p, align 16
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%fits_in_gp = icmp ult i32 %gp_offset, 41
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br i1 %fits_in_gp, label %vaarg.in_reg, label %vaarg.in_mem
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; CHECK: cmpl $40, [[COUNT:.*]]
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; CHECK: ja .[[IN_MEM:.*]]
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vaarg.in_reg: ; preds = %entry
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%1 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0, i32 3
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%reg_save_area = load i8*, i8** %1, align 4
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%2 = getelementptr i8, i8* %reg_save_area, i32 %gp_offset
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%3 = add i32 %gp_offset, 8
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store i32 %3, i32* %gp_offset_p, align 16
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br label %vaarg.end
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; CHECK: movl {{[^,]*}}, [[ADDR:.*]]
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; CHECK: addl [[COUNT]], [[ADDR]]
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; SSE: jmp .[[END:.*]]
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; NOSSE: movl ([[ADDR]]), %eax
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; NOSSE: retq
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; CHECK: .[[IN_MEM]]:
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vaarg.in_mem: ; preds = %entry
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%overflow_arg_area_p = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0, i32 2
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%overflow_arg_area = load i8*, i8** %overflow_arg_area_p, align 8
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%overflow_arg_area.next = getelementptr i8, i8* %overflow_arg_area, i32 8
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store i8* %overflow_arg_area.next, i8** %overflow_arg_area_p, align 8
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br label %vaarg.end
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; CHECK: movl {{[^,]*}}, [[ADDR]]
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; NOSSE: movl ([[ADDR]]), %eax
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; NOSSE: retq
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; SSE: .[[END]]:
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vaarg.end: ; preds = %vaarg.in_mem, %vaarg.in_reg
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%vaarg.addr.in = phi i8* [ %2, %vaarg.in_reg ], [ %overflow_arg_area, %vaarg.in_mem ]
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%vaarg.addr = bitcast i8* %vaarg.addr.in to i32*
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%4 = load i32, i32* %vaarg.addr, align 4
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call void @llvm.va_end(i8* %0)
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call void @llvm.lifetime.end.p0i8(i64 16, i8* %0) #2
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ret i32 %4
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; SSE: movl ([[ADDR]]), %eax
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; SSE: retq
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}
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; Function Attrs: nounwind argmemonly
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind
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; Function Attrs: nounwind
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declare void @llvm.va_start(i8*) nounwind
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; Function Attrs: nounwind
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declare void @llvm.va_end(i8*) nounwind
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; Function Attrs: nounwind argmemonly
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind
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