180 lines
7.4 KiB
LLVM
180 lines
7.4 KiB
LLVM
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; Test basic address sanitizer instrumentation.
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;
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; RUN: opt < %s -memprof -memprof-module -S | FileCheck --check-prefixes=CHECK,CHECK-S3 %s
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; RUN: opt < %s -memprof -memprof-module -memprof-mapping-scale=5 -S | FileCheck --check-prefixes=CHECK,CHECK-S5 %s
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; We need the requires since both memprof and memprof-module require reading module level metadata which is done once by the memprof-globals-md analysis
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; RUN: opt < %s -passes='function(memprof),module(memprof-module)' -S | FileCheck --check-prefixes=CHECK,CHECK-S3 %s
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; RUN: opt < %s -passes='function(memprof),module(memprof-module)' -memprof-mapping-scale=5 -S | FileCheck --check-prefixes=CHECK,CHECK-S5 %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK: @llvm.global_ctors = {{.*}}@memprof.module_ctor
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define i32 @test_load(i32* %a) {
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entry:
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%tmp1 = load i32, i32* %a, align 4
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ret i32 %tmp1
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}
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; CHECK-LABEL: @test_load
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; CHECK: %[[SHADOW_OFFSET:[^ ]*]] = load i64, i64* @__memprof_shadow_memory_dynamic_address
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; CHECK-NEXT: %[[LOAD_ADDR:[^ ]*]] = ptrtoint i32* %a to i64
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; CHECK-NEXT: %[[MASKED_ADDR:[^ ]*]] = and i64 %[[LOAD_ADDR]], -64
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; CHECK-S3-NEXT: %[[SHIFTED_ADDR:[^ ]*]] = lshr i64 %[[MASKED_ADDR]], 3
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; CHECK-S5-NEXT: %[[SHIFTED_ADDR:[^ ]*]] = lshr i64 %[[MASKED_ADDR]], 5
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; CHECK-NEXT: add i64 %[[SHIFTED_ADDR]], %[[SHADOW_OFFSET]]
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; CHECK-NEXT: %[[LOAD_SHADOW_PTR:[^ ]*]] = inttoptr
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; CHECK-NEXT: %[[LOAD_SHADOW:[^ ]*]] = load i64, i64* %[[LOAD_SHADOW_PTR]]
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; CHECK-NEXT: %[[NEW_SHADOW:[^ ]*]] = add i64 %[[LOAD_SHADOW]], 1
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; CHECK-NEXT: store i64 %[[NEW_SHADOW]], i64* %[[LOAD_SHADOW_PTR]]
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; The actual load.
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; CHECK-NEXT: %tmp1 = load i32, i32* %a
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; CHECK-NEXT: ret i32 %tmp1
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define void @test_store(i32* %a) {
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entry:
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store i32 42, i32* %a, align 4
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ret void
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}
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; CHECK-LABEL: @test_store
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; CHECK: %[[SHADOW_OFFSET:[^ ]*]] = load i64, i64* @__memprof_shadow_memory_dynamic_address
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; CHECK-NEXT: %[[STORE_ADDR:[^ ]*]] = ptrtoint i32* %a to i64
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; CHECK-NEXT: %[[MASKED_ADDR:[^ ]*]] = and i64 %[[STORE_ADDR]], -64
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; CHECK-S3-NEXT: %[[SHIFTED_ADDR:[^ ]*]] = lshr i64 %[[MASKED_ADDR]], 3
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; CHECK-S5-NEXT: %[[SHIFTED_ADDR:[^ ]*]] = lshr i64 %[[MASKED_ADDR]], 5
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; CHECK-NEXT: add i64 %[[SHIFTED_ADDR]], %[[SHADOW_OFFSET]]
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; CHECK-NEXT: %[[STORE_SHADOW_PTR:[^ ]*]] = inttoptr
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; CHECK-NEXT: %[[STORE_SHADOW:[^ ]*]] = load i64, i64* %[[STORE_SHADOW_PTR]]
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; CHECK-NEXT: %[[NEW_SHADOW:[^ ]*]] = add i64 %[[STORE_SHADOW]], 1
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; CHECK-NEXT: store i64 %[[NEW_SHADOW]], i64* %[[STORE_SHADOW_PTR]]
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; The actual store.
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; CHECK-NEXT: store i32 42, i32* %a
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; CHECK-NEXT: ret void
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define void @FP80Test(x86_fp80* nocapture %a) nounwind uwtable {
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entry:
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store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %a, align 16
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ret void
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}
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; CHECK-LABEL: @FP80Test
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; Exactly one shadow update for store access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_ST_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_ST_SHADOW]]
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; CHECK-NOT: store i64
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; The actual store.
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; CHECK: store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %a
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; CHECK: ret void
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define void @i40test(i40* %a, i40* %b) nounwind uwtable {
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entry:
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%t = load i40, i40* %a
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store i40 %t, i40* %b, align 8
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ret void
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}
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; CHECK-LABEL: @i40test
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; Exactly one shadow update for load access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_LD_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_LD_SHADOW]]
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; CHECK-NOT: store i64
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; The actual load.
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; CHECK: %t = load i40, i40* %a
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; Exactly one shadow update for store access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_ST_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_ST_SHADOW]]
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; CHECK-NOT: store i64
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; The actual store.
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; CHECK: store i40 %t, i40* %b
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; CHECK: ret void
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define void @i64test_align1(i64* %b) nounwind uwtable {
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entry:
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store i64 0, i64* %b, align 1
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ret void
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}
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; CHECK-LABEL: @i64test
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; Exactly one shadow update for store access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_ST_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_ST_SHADOW]]
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; CHECK-NOT: store i64
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; The actual store.
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; CHECK: store i64 0, i64* %b
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; CHECK: ret void
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define void @i80test(i80* %a, i80* %b) nounwind uwtable {
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entry:
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%t = load i80, i80* %a
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store i80 %t, i80* %b, align 8
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ret void
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}
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; CHECK-LABEL: i80test
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; Exactly one shadow update for load access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_LD_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_LD_SHADOW]]
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; CHECK-NOT: store i64
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; The actual load.
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; CHECK: %t = load i80, i80* %a
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; Exactly one shadow update for store access.
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; CHECK-NOT: store i64
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; CHECK: %[[NEW_ST_SHADOW:[^ ]*]] = add i64 %{{.*}}, 1
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; CHECK-NEXT: store i64 %[[NEW_ST_SHADOW]]
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; CHECK-NOT: store i64
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; The actual store.
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; CHECK: store i80 %t, i80* %b
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; CHECK: ret void
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; memprof should not instrument functions with available_externally linkage.
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define available_externally i32 @f_available_externally(i32* %a) {
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entry:
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%tmp1 = load i32, i32* %a
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ret i32 %tmp1
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}
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; CHECK-LABEL: @f_available_externally
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; CHECK-NOT: __memprof_shadow_memory_dynamic_address
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; CHECK: ret i32
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) nounwind
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define void @memintr_test(i8* %a, i8* %b) nounwind uwtable {
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entry:
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tail call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 100, i1 false)
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tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
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ret void
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}
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; CHECK-LABEL: memintr_test
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; CHECK: __memprof_memset
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; CHECK: __memprof_memmove
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; CHECK: __memprof_memcpy
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; CHECK: ret void
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declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* nocapture writeonly, i8, i64, i32) nounwind
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declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
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declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
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define void @memintr_element_atomic_test(i8* %a, i8* %b) nounwind uwtable {
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; This is a canary test to make sure that these don't get lowered into calls that don't
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; have the element-atomic property. Eventually, memprof will have to be enhanced to lower
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; these properly.
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; CHECK-LABEL: memintr_element_atomic_test
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; CHECK: tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %a, i8 0, i64 100, i32 1)
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; CHECK: tail call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
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; CHECK: tail call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
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; CHECK: ret void
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tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %a, i8 0, i64 100, i32 1)
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tail call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
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tail call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
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ret void
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}
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; CHECK: define internal void @memprof.module_ctor()
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; CHECK: call void @__memprof_init()
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