399 lines
14 KiB
ArmAsm
399 lines
14 KiB
ArmAsm
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# RUN: llvm-mc -filetype=obj -arch mipsel %s | llvm-readobj -r - | FileCheck %s
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# Test the order of records in the relocation table.
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#
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# MIPS has a few relocations that have an AHL component in the expression used
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# to evaluate them. This AHL component is an addend with the same number of
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# bits as a symbol value but not all of our ABI's are able to supply a
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# sufficiently sized addend in a single relocation.
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#
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# The O32 ABI for example, uses REL relocations which store the addend in the
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# section data. All the relocations with AHL components affect 16-bit fields
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# so the addend is limited to 16-bit. This ABI resolves the limitation by
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# linking relocations (e.g. R_MIPS_HI16 and R_MIPS_LO16) and distributing the
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# addend between the linked relocations. The ABI mandates that such relocations
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# must be next to each other in a particular order (e.g. R_MIPS_HI16 must be
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# followed by a matching R_MIPS_LO16) but the rule is less strict in practice.
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#
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# See MipsELFObjectWriter.cpp for a full description of the rules.
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#
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# TODO: Add mips16 and micromips tests.
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# HILO 1: HI/LO already match
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.section .mips_hilo_1, "ax", @progbits
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lui $2, %hi(sym1)
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addiu $2, $2, %lo(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_1 {
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# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 2: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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.section .mips_hilo_2, "ax", @progbits
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addiu $2, $2, %lo(sym1)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_2 {
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 3: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same.
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.section .mips_hilo_3, "ax", @progbits
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addiu $2, $2, %lo(sym1)
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lui $2, %hi(sym2)
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addiu $2, $2, %lo(sym2)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3 {
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# CHECK-NEXT: 0xC R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym2
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# CHECK-NEXT: 0x8 R_MIPS_LO16 sym2
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# CHECK-NEXT: }
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# HILO 3b: Same as 3 but a different starting order.
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.section .mips_hilo_3b, "ax", @progbits
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addiu $2, $2, %lo(sym1)
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lui $2, %hi(sym1)
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addiu $2, $2, %lo(sym2)
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lui $2, %hi(sym2)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3b {
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0xC R_MIPS_HI16 sym2
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# CHECK-NEXT: 0x8 R_MIPS_LO16 sym2
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# CHECK-NEXT: }
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# HILO 4: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is the same.
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.section .mips_hilo_4, "ax", @progbits
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addiu $2, $2, %lo(sym1)
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addiu $2, $2, %lo(sym1+4)
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lui $2, %hi(sym1+4)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_4 {
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# CHECK-NEXT: 0xC R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 5: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is greater or equal. Exact matches are preferred so both
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# R_MIPS_HI16's match the same R_MIPS_LO16.
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.section .mips_hilo_5, "ax", @progbits
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lui $2, %hi(sym1)
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lui $2, %hi(sym1)
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addiu $2, $2, %lo(sym1+1)
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addiu $2, $2, %lo(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_5 {
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# CHECK-NEXT: 0x8 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0xC R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 6: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is greater or equal. Smaller offsets are preferred so both
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# R_MIPS_HI16's still match the same R_MIPS_LO16.
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.section .mips_hilo_6, "ax", @progbits
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lui $2, %hi(sym1)
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lui $2, %hi(sym1)
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addiu $2, $2, %lo(sym1+2)
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addiu $2, $2, %lo(sym1+1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_6 {
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# CHECK-NEXT: 0x8 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0xC R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 7: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is greater or equal so that the carry bit is correct. The two
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# R_MIPS_HI16's therefore match different R_MIPS_LO16's.
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.section .mips_hilo_7, "ax", @progbits
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addiu $2, $2, %lo(sym1+1)
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addiu $2, $2, %lo(sym1+6)
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lui $2, %hi(sym1+4)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_7 {
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# CHECK-NEXT: 0xC R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 8: R_MIPS_LO16's may be orphaned.
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.section .mips_hilo_8, "ax", @progbits
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lw $2, %lo(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8 {
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.
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.section .mips_hilo_8b, "ax", @progbits
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lw $2, %lo(sym1)
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lw $2, %lo(sym1)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8b {
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# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 9: R_MIPS_HI16's don't need a matching R_MIPS_LO16 to immediately follow
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# so long as there is one after the R_MIPS_HI16 somewhere. This isn't
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# permitted by the ABI specification but has been allowed in practice
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# for a very long time. The R_MIPS_HI16's should be ordered by the
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# address they affect for purely cosmetic reasons.
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.section .mips_hilo_9, "ax", @progbits
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lw $2, %lo(sym1)
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lui $2, %hi(sym1)
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lui $2, %hi(sym1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_9 {
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# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
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# CHECK-NEXT: }
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# HILO 10: R_MIPS_HI16's must have a matching R_MIPS_LO16 somewhere though.
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# When this is impossible we have two possible bad behaviours
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# depending on the linker implementation:
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# * The linker silently computes the wrong value using a partially
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# matching R_MIPS_LO16.
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# * The linker rejects the relocation table as invalid.
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# The latter is preferable since it's far easier to detect and debug so
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# check that we encourage this behaviour by putting invalid
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# R_MIPS_HI16's at the end of the relocation table where the risk of a
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# partial match is very low.
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.section .mips_hilo_10, "ax", @progbits
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lui $2, %hi(sym1)
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lw $2, %lo(sym1)
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lui $2, %hi(sym2)
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lui $2, %hi(sym3)
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lw $2, %lo(sym3)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_10 {
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# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
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# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
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# CHECK-NEXT: 0xC R_MIPS_HI16 sym3
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# CHECK-NEXT: 0x10 R_MIPS_LO16 sym3
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# CHECK-NEXT: 0x8 R_MIPS_HI16 sym2
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# CHECK-NEXT: }
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# Now do the same tests for GOT/LO.
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# The rules only apply to R_MIPS_GOT16 on local symbols which are also
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# rewritten into section relative relocations.
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# GOTLO 1: GOT/LO already match
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.section .mips_gotlo_1, "ax", @progbits
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lui $2, %got(local1)
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addiu $2, $2, %lo(local1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_1 {
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# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x4 R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
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.section .mips_gotlo_2, "ax", @progbits
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addiu $2, $2, %lo(local1)
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lui $2, %got(local1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_2 {
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# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 3: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same.
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.section .mips_gotlo_3, "ax", @progbits
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addiu $2, $2, %lo(local1)
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lui $2, %got(local2)
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addiu $2, $2, %lo(local2)
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lui $2, %got(local1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3 {
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# CHECK-NEXT: 0xC R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
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# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x8 R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 3b: Same as 3 but a different starting order.
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.section .mips_gotlo_3b, "ax", @progbits
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addiu $2, $2, %lo(local1)
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lui $2, %got(local1)
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addiu $2, $2, %lo(local2)
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lui $2, %got(local2)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3b {
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# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
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# CHECK-NEXT: 0xC R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x8 R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 4: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is the same.
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.section .mips_gotlo_4, "ax", @progbits
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addiu $2, $2, %lo(local1)
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addiu $2, $2, %lo(local1+4)
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lui $2, %got(local1+4)
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lui $2, %got(local1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_4 {
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# CHECK-NEXT: 0xC R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
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# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x4 R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 5: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is greater or equal. Exact matches are preferred so both
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# R_MIPS_GOT16's match the same R_MIPS_LO16.
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.section .mips_gotlo_5, "ax", @progbits
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lui $2, %got(local1)
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lui $2, %got(local1)
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addiu $2, $2, %lo(local1+1)
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addiu $2, $2, %lo(local1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_5 {
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# CHECK-NEXT: 0x8 R_MIPS_LO16 .text
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# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0xC R_MIPS_LO16 .text
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# CHECK-NEXT: }
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# GOTLO 6: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
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# The second relocation matches if the symbol is the same and the
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# offset is greater or equal. Smaller offsets are preferred so both
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# R_MIPS_GOT16's still match the same R_MIPS_LO16.
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.section .mips_gotlo_6, "ax", @progbits
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lui $2, %got(local1)
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lui $2, %got(local1)
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addiu $2, $2, %lo(local1+2)
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addiu $2, $2, %lo(local1+1)
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# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_6 {
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# CHECK-NEXT: 0x8 R_MIPS_LO16 .text
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# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
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# CHECK-NEXT: 0xC R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# GOTLO 7: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
|
||
|
|
# The second relocation matches if the symbol is the same and the
|
||
|
|
# offset is greater or equal so that the carry bit is correct. The two
|
||
|
|
# R_MIPS_GOT16's therefore match different R_MIPS_LO16's.
|
||
|
|
.section .mips_gotlo_7, "ax", @progbits
|
||
|
|
addiu $2, $2, %lo(local1+1)
|
||
|
|
addiu $2, $2, %lo(local1+6)
|
||
|
|
lui $2, %got(local1+4)
|
||
|
|
lui $2, %got(local1)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_7 {
|
||
|
|
# CHECK-NEXT: 0xC R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x4 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# GOTLO 8: R_MIPS_LO16's may be orphaned.
|
||
|
|
.section .mips_gotlo_8, "ax", @progbits
|
||
|
|
lw $2, %lo(local1)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8 {
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# GOTLO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.
|
||
|
|
.section .mips_gotlo_8b, "ax", @progbits
|
||
|
|
lw $2, %lo(local1)
|
||
|
|
lw $2, %lo(local1)
|
||
|
|
lui $2, %got(local1)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8b {
|
||
|
|
# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: 0x4 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# GOTLO 9: R_MIPS_GOT16's don't need a matching R_MIPS_LO16 to immediately
|
||
|
|
# follow so long as there is one after the R_MIPS_GOT16 somewhere.
|
||
|
|
# This isn't permitted by the ABI specification but has been allowed
|
||
|
|
# in practice for a very long time. The R_MIPS_GOT16's should be
|
||
|
|
# ordered by the address they affect for purely cosmetic reasons.
|
||
|
|
.section .mips_gotlo_9, "ax", @progbits
|
||
|
|
lw $2, %lo(local1)
|
||
|
|
lui $2, %got(local1)
|
||
|
|
lui $2, %got(local1)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_9 {
|
||
|
|
# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# GOTLO 10: R_MIPS_GOT16's must have a matching R_MIPS_LO16 somewhere though.
|
||
|
|
# When this is impossible we have two possible bad behaviours
|
||
|
|
# depending on the linker implementation:
|
||
|
|
# * The linker silently computes the wrong value using a partially
|
||
|
|
# matching R_MIPS_LO16.
|
||
|
|
# * The linker rejects the relocation table as invalid.
|
||
|
|
# The latter is preferable since it's far easier to detect and debug
|
||
|
|
# so check that we encourage this behaviour by putting invalid
|
||
|
|
# R_MIPS_GOT16's at the end of the relocation table where the risk of
|
||
|
|
# a partial match is very low.
|
||
|
|
.section .mips_gotlo_10, "ax", @progbits
|
||
|
|
lui $2, %got(local1)
|
||
|
|
lw $2, %lo(local1)
|
||
|
|
lui $2, %got(local2)
|
||
|
|
lui $2, %got(local3)
|
||
|
|
lw $2, %lo(local3)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_10 {
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x4 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: 0xC R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: 0x10 R_MIPS_LO16 .text
|
||
|
|
# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# Finally, do test 2 for R_MIPS_GOT16 on external symbols to prove they are
|
||
|
|
# exempt from the rules for local symbols.
|
||
|
|
|
||
|
|
# External GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
|
||
|
|
.section .mips_ext_gotlo_2, "ax", @progbits
|
||
|
|
addiu $2, $2, %lo(sym1)
|
||
|
|
lui $2, %got(sym1)
|
||
|
|
|
||
|
|
# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_ext_gotlo_2 {
|
||
|
|
# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
|
||
|
|
# CHECK-NEXT: 0x4 R_MIPS_GOT16 sym1
|
||
|
|
# CHECK-NEXT: }
|
||
|
|
|
||
|
|
# Define some local symbols.
|
||
|
|
.text
|
||
|
|
nop
|
||
|
|
local1: nop
|
||
|
|
local2: nop
|
||
|
|
local3: nop
|