154 lines
4.0 KiB
LLVM
154 lines
4.0 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -instcombine < %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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; Positive test - all uses are identical casts.
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define void @t0(i1 zeroext %c0, i1 zeroext %c1, i64* nocapture readonly %src) {
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; CHECK-LABEL: @t0(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
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; CHECK-NEXT: br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: tail call void @abort()
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; CHECK-NEXT: unreachable
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; CHECK: bb5:
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; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
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; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]])
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; CHECK-NEXT: br label [[BB9:%.*]]
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; CHECK: bb7:
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; CHECK-NEXT: [[PTR1:%.*]] = inttoptr i64 [[DATA]] to i32*
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; CHECK-NEXT: tail call void @sink1(i32* [[PTR1]])
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; CHECK-NEXT: br label [[BB9]]
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; CHECK: bb9:
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; CHECK-NEXT: ret void
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;
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bb:
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%data = load i64, i64* %src, align 8
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br i1 %c0, label %bb3, label %bb7
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bb3:
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br i1 %c1, label %bb4, label %bb5
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bb4:
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tail call void @abort()
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unreachable
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bb5:
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%ptr0 = inttoptr i64 %data to i32*
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tail call void @sink0(i32* %ptr0)
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br label %bb9
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bb7:
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%ptr1 = inttoptr i64 %data to i32*
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tail call void @sink1(i32* %ptr1)
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br label %bb9
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bb9:
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ret void
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}
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; Negative test - all uses are casts, but non-identical ones.
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define void @n1(i1 zeroext %c0, i1 zeroext %c1, i64* nocapture readonly %src) {
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; CHECK-LABEL: @n1(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
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; CHECK-NEXT: br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: tail call void @abort()
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; CHECK-NEXT: unreachable
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; CHECK: bb5:
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; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
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; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]])
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; CHECK-NEXT: br label [[BB9:%.*]]
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; CHECK: bb7:
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; CHECK-NEXT: [[VEC:%.*]] = bitcast i64 [[DATA]] to <2 x i32>
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; CHECK-NEXT: tail call void @sink2(<2 x i32> [[VEC]])
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; CHECK-NEXT: br label [[BB9]]
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; CHECK: bb9:
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; CHECK-NEXT: ret void
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;
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bb:
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%data = load i64, i64* %src, align 8
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br i1 %c0, label %bb3, label %bb7
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bb3:
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br i1 %c1, label %bb4, label %bb5
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bb4:
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tail call void @abort()
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unreachable
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bb5:
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%ptr0 = inttoptr i64 %data to i32*
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tail call void @sink0(i32* %ptr0)
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br label %bb9
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bb7:
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%vec = bitcast i64 %data to <2 x i32> ; different cast
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tail call void @sink2(<2 x i32> %vec)
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br label %bb9
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bb9:
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ret void
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}
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; Negative test - have non-cast users.
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define void @n2(i1 zeroext %c0, i1 zeroext %c1, i64* nocapture readonly %src) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
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; CHECK-NEXT: br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: tail call void @abort()
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; CHECK-NEXT: unreachable
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; CHECK: bb5:
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; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
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; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]])
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; CHECK-NEXT: br label [[BB9:%.*]]
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; CHECK: bb7:
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; CHECK-NEXT: tail call void @sink3(i64 [[DATA]])
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; CHECK-NEXT: br label [[BB9]]
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; CHECK: bb9:
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; CHECK-NEXT: ret void
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;
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bb:
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%data = load i64, i64* %src, align 8
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br i1 %c0, label %bb3, label %bb7
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bb3:
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br i1 %c1, label %bb4, label %bb5
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bb4:
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tail call void @abort()
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unreachable
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bb5:
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%ptr0 = inttoptr i64 %data to i32*
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tail call void @sink0(i32* %ptr0)
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br label %bb9
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bb7:
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tail call void @sink3(i64 %data) ; non-cast use
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br label %bb9
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bb9:
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ret void
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}
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declare void @abort()
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declare void @sink0(i32*)
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declare void @sink1(i32*)
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declare void @sink2(<2 x i32>)
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declare void @sink3(i64)
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