238 lines
11 KiB
LLVM
238 lines
11 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -memcpyopt -S -enable-memcpyopt-memoryssa=0 | FileCheck %s --check-prefix=NO_MSSA
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; RUN: opt < %s -memcpyopt -S -enable-memcpyopt-memoryssa=1 -verify-memoryssa | FileCheck %s --check-prefix=MSSA
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; Test whether memcpy-memcpy dependence is optimized across
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; basic blocks (conditional branches and invokes).
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; TODO: This is not supported yet.
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%struct.s = type { i32, i32 }
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@s_foo = private unnamed_addr constant %struct.s { i32 1, i32 2 }, align 4
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@s_baz = private unnamed_addr constant %struct.s { i32 1, i32 2 }, align 4
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@i = external constant i8*
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declare void @qux()
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
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declare void @__cxa_throw(i8*, i8*, i8*)
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declare i32 @__gxx_personality_v0(...)
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declare i8* @__cxa_begin_catch(i8*)
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; A simple partial redundancy. Test that the second memcpy is optimized
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; to copy directly from the original source rather than from the temporary.
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define void @wobble(i8* noalias %dst, i8* %src, i1 %some_condition) {
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; NO_MSSA-LABEL: @wobble(
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; NO_MSSA-NEXT: bb:
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; NO_MSSA-NEXT: [[TEMP:%.*]] = alloca i8, i32 64, align 1
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TEMP]], i8* nonnull align 8 [[SRC:%.*]], i64 64, i1 false)
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; NO_MSSA-NEXT: br i1 [[SOME_CONDITION:%.*]], label [[MORE:%.*]], label [[OUT:%.*]]
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; NO_MSSA: out:
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; NO_MSSA-NEXT: call void @qux()
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; NO_MSSA-NEXT: unreachable
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; NO_MSSA: more:
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[DST:%.*]], i8* align 8 [[TEMP]], i64 64, i1 false)
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; NO_MSSA-NEXT: ret void
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;
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; MSSA-LABEL: @wobble(
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; MSSA-NEXT: bb:
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; MSSA-NEXT: [[TEMP:%.*]] = alloca i8, i32 64, align 1
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TEMP]], i8* nonnull align 8 [[SRC:%.*]], i64 64, i1 false)
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; MSSA-NEXT: br i1 [[SOME_CONDITION:%.*]], label [[MORE:%.*]], label [[OUT:%.*]]
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; MSSA: out:
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; MSSA-NEXT: call void @qux()
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; MSSA-NEXT: unreachable
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; MSSA: more:
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[DST:%.*]], i8* align 8 [[SRC]], i64 64, i1 false)
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; MSSA-NEXT: ret void
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;
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bb:
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%temp = alloca i8, i32 64
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %temp, i8* nonnull align 8%src, i64 64, i1 false)
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br i1 %some_condition, label %more, label %out
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out:
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call void @qux()
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unreachable
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more:
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %dst, i8* align 8 %temp, i64 64, i1 false)
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ret void
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}
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; A CFG triangle with a partial redundancy targeting an alloca. Test that the
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; memcpy inside the triangle is optimized to copy directly from the original
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; source rather than from the temporary.
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define i32 @foo(i1 %t3) {
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; NO_MSSA-LABEL: @foo(
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; NO_MSSA-NEXT: bb:
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; NO_MSSA-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
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; NO_MSSA-NEXT: [[T:%.*]] = alloca [[STRUCT_S]], align 4
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; NO_MSSA-NEXT: [[S1:%.*]] = bitcast %struct.s* [[S]] to i8*
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[S1]], i8* align 4 bitcast (%struct.s* @s_foo to i8*), i64 8, i1 false)
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; NO_MSSA-NEXT: br i1 [[T3:%.*]], label [[BB4:%.*]], label [[BB7:%.*]]
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; NO_MSSA: bb4:
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; NO_MSSA-NEXT: [[T5:%.*]] = bitcast %struct.s* [[T]] to i8*
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; NO_MSSA-NEXT: [[S6:%.*]] = bitcast %struct.s* [[S]] to i8*
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[T5]], i8* align 4 [[S6]], i64 8, i1 false)
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; NO_MSSA-NEXT: br label [[BB7]]
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; NO_MSSA: bb7:
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; NO_MSSA-NEXT: [[T8:%.*]] = getelementptr [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 0
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; NO_MSSA-NEXT: [[T9:%.*]] = load i32, i32* [[T8]], align 4
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; NO_MSSA-NEXT: [[T10:%.*]] = getelementptr [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 1
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; NO_MSSA-NEXT: [[T11:%.*]] = load i32, i32* [[T10]], align 4
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; NO_MSSA-NEXT: [[T12:%.*]] = add i32 [[T9]], [[T11]]
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; NO_MSSA-NEXT: ret i32 [[T12]]
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;
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; MSSA-LABEL: @foo(
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; MSSA-NEXT: bb:
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; MSSA-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
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; MSSA-NEXT: [[T:%.*]] = alloca [[STRUCT_S]], align 4
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; MSSA-NEXT: [[S1:%.*]] = bitcast %struct.s* [[S]] to i8*
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[S1]], i8* align 4 bitcast (%struct.s* @s_foo to i8*), i64 8, i1 false)
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; MSSA-NEXT: br i1 [[T3:%.*]], label [[BB4:%.*]], label [[BB7:%.*]]
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; MSSA: bb4:
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; MSSA-NEXT: [[T5:%.*]] = bitcast %struct.s* [[T]] to i8*
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; MSSA-NEXT: [[S6:%.*]] = bitcast %struct.s* [[S]] to i8*
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[T5]], i8* align 4 bitcast (%struct.s* @s_foo to i8*), i64 8, i1 false)
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; MSSA-NEXT: br label [[BB7]]
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; MSSA: bb7:
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; MSSA-NEXT: [[T8:%.*]] = getelementptr [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 0
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; MSSA-NEXT: [[T9:%.*]] = load i32, i32* [[T8]], align 4
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; MSSA-NEXT: [[T10:%.*]] = getelementptr [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 1
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; MSSA-NEXT: [[T11:%.*]] = load i32, i32* [[T10]], align 4
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; MSSA-NEXT: [[T12:%.*]] = add i32 [[T9]], [[T11]]
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; MSSA-NEXT: ret i32 [[T12]]
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;
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bb:
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%s = alloca %struct.s, align 4
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%t = alloca %struct.s, align 4
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%s1 = bitcast %struct.s* %s to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %s1, i8* align 4 bitcast (%struct.s* @s_foo to i8*), i64 8, i1 false)
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br i1 %t3, label %bb4, label %bb7
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bb4: ; preds = %bb
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%t5 = bitcast %struct.s* %t to i8*
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%s6 = bitcast %struct.s* %s to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %t5, i8* align 4 %s6, i64 8, i1 false)
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br label %bb7
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bb7: ; preds = %bb4, %bb
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%t8 = getelementptr %struct.s, %struct.s* %t, i32 0, i32 0
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%t9 = load i32, i32* %t8, align 4
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%t10 = getelementptr %struct.s, %struct.s* %t, i32 0, i32 1
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%t11 = load i32, i32* %t10, align 4
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%t12 = add i32 %t9, %t11
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ret i32 %t12
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}
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; A CFG diamond with an invoke on one side, and a partially redundant memcpy
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; into an alloca on the other. Test that the memcpy inside the diamond is
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; optimized to copy ; directly from the original source rather than from the
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; temporary. This more complex test represents a relatively common usage
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; pattern.
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define i32 @baz(i1 %t5) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; NO_MSSA-LABEL: @baz(
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; NO_MSSA-NEXT: bb:
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; NO_MSSA-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
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; NO_MSSA-NEXT: [[T:%.*]] = alloca [[STRUCT_S]], align 4
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; NO_MSSA-NEXT: [[S3:%.*]] = bitcast %struct.s* [[S]] to i8*
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[S3]], i8* align 4 bitcast (%struct.s* @s_baz to i8*), i64 8, i1 false)
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; NO_MSSA-NEXT: br i1 [[T5:%.*]], label [[BB6:%.*]], label [[BB22:%.*]]
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; NO_MSSA: bb6:
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; NO_MSSA-NEXT: invoke void @__cxa_throw(i8* null, i8* bitcast (i8** @i to i8*), i8* null)
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; NO_MSSA-NEXT: to label [[BB25:%.*]] unwind label [[BB9:%.*]]
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; NO_MSSA: bb9:
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; NO_MSSA-NEXT: [[T10:%.*]] = landingpad { i8*, i32 }
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; NO_MSSA-NEXT: catch i8* null
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; NO_MSSA-NEXT: br label [[BB13:%.*]]
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; NO_MSSA: bb13:
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; NO_MSSA-NEXT: [[T15:%.*]] = call i8* @__cxa_begin_catch(i8* null)
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; NO_MSSA-NEXT: br label [[BB23:%.*]]
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; NO_MSSA: bb22:
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; NO_MSSA-NEXT: [[T23:%.*]] = bitcast %struct.s* [[T]] to i8*
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; NO_MSSA-NEXT: [[S24:%.*]] = bitcast %struct.s* [[S]] to i8*
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; NO_MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[T23]], i8* align 4 [[S24]], i64 8, i1 false)
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; NO_MSSA-NEXT: br label [[BB23]]
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; NO_MSSA: bb23:
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; NO_MSSA-NEXT: [[T17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 0
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; NO_MSSA-NEXT: [[T18:%.*]] = load i32, i32* [[T17]], align 4
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; NO_MSSA-NEXT: [[T19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 1
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; NO_MSSA-NEXT: [[T20:%.*]] = load i32, i32* [[T19]], align 4
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; NO_MSSA-NEXT: [[T21:%.*]] = add nsw i32 [[T18]], [[T20]]
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; NO_MSSA-NEXT: ret i32 [[T21]]
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; NO_MSSA: bb25:
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; NO_MSSA-NEXT: unreachable
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;
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; MSSA-LABEL: @baz(
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; MSSA-NEXT: bb:
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; MSSA-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
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; MSSA-NEXT: [[T:%.*]] = alloca [[STRUCT_S]], align 4
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; MSSA-NEXT: [[S3:%.*]] = bitcast %struct.s* [[S]] to i8*
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[S3]], i8* align 4 bitcast (%struct.s* @s_baz to i8*), i64 8, i1 false)
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; MSSA-NEXT: br i1 [[T5:%.*]], label [[BB6:%.*]], label [[BB22:%.*]]
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; MSSA: bb6:
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; MSSA-NEXT: invoke void @__cxa_throw(i8* null, i8* bitcast (i8** @i to i8*), i8* null)
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; MSSA-NEXT: to label [[BB25:%.*]] unwind label [[BB9:%.*]]
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; MSSA: bb9:
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; MSSA-NEXT: [[T10:%.*]] = landingpad { i8*, i32 }
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; MSSA-NEXT: catch i8* null
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; MSSA-NEXT: br label [[BB13:%.*]]
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; MSSA: bb13:
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; MSSA-NEXT: [[T15:%.*]] = call i8* @__cxa_begin_catch(i8* null)
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; MSSA-NEXT: br label [[BB23:%.*]]
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; MSSA: bb22:
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; MSSA-NEXT: [[T23:%.*]] = bitcast %struct.s* [[T]] to i8*
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; MSSA-NEXT: [[S24:%.*]] = bitcast %struct.s* [[S]] to i8*
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; MSSA-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[T23]], i8* align 4 bitcast (%struct.s* @s_baz to i8*), i64 8, i1 false)
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; MSSA-NEXT: br label [[BB23]]
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; MSSA: bb23:
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; MSSA-NEXT: [[T17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 0
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; MSSA-NEXT: [[T18:%.*]] = load i32, i32* [[T17]], align 4
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; MSSA-NEXT: [[T19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[T]], i32 0, i32 1
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; MSSA-NEXT: [[T20:%.*]] = load i32, i32* [[T19]], align 4
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; MSSA-NEXT: [[T21:%.*]] = add nsw i32 [[T18]], [[T20]]
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; MSSA-NEXT: ret i32 [[T21]]
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; MSSA: bb25:
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; MSSA-NEXT: unreachable
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;
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bb:
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%s = alloca %struct.s, align 4
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%t = alloca %struct.s, align 4
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%s3 = bitcast %struct.s* %s to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %s3, i8* align 4 bitcast (%struct.s* @s_baz to i8*), i64 8, i1 false)
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br i1 %t5, label %bb6, label %bb22
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bb6: ; preds = %bb
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invoke void @__cxa_throw(i8* null, i8* bitcast (i8** @i to i8*), i8* null)
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to label %bb25 unwind label %bb9
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bb9: ; preds = %bb6
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%t10 = landingpad { i8*, i32 }
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catch i8* null
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br label %bb13
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bb13: ; preds = %bb9
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%t15 = call i8* @__cxa_begin_catch(i8* null)
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br label %bb23
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bb22: ; preds = %bb
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%t23 = bitcast %struct.s* %t to i8*
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%s24 = bitcast %struct.s* %s to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %t23, i8* align 4 %s24, i64 8, i1 false)
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br label %bb23
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bb23: ; preds = %bb22, %bb13
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%t17 = getelementptr inbounds %struct.s, %struct.s* %t, i32 0, i32 0
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%t18 = load i32, i32* %t17, align 4
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%t19 = getelementptr inbounds %struct.s, %struct.s* %t, i32 0, i32 1
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%t20 = load i32, i32* %t19, align 4
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%t21 = add nsw i32 %t18, %t20
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ret i32 %t21
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bb25: ; preds = %bb6
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unreachable
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}
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