132 lines
6.6 KiB
LLVM
132 lines
6.6 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=SIMPLIFYCFG
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; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINEONLY
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; RUN: opt -instcombine -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY
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; RUN: opt -instcombine -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE
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; RUN: opt -instcombine -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY
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; RUN: opt -instcombine -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-linux-gnu"
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; #include <limits>
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; #include <cstdint>
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;
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; using size_type = std::size_t;
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; bool will_not_overflow(size_type size, size_type nmemb) {
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; return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size));
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; }
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define i1 @will_not_overflow(i64 %arg, i64 %arg1) {
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; SIMPLIFYCFG-LABEL: @will_not_overflow(
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; SIMPLIFYCFG-NEXT: bb:
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; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
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; SIMPLIFYCFG: bb2:
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; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]]
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; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]
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; SIMPLIFYCFG-NEXT: br label [[BB5]]
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; SIMPLIFYCFG: bb5:
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; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]
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; SIMPLIFYCFG-NEXT: ret i1 [[T6]]
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;
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; INSTCOMBINEONLY-LABEL: @will_not_overflow(
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; INSTCOMBINEONLY-NEXT: bb:
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; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
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; INSTCOMBINEONLY: bb2:
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; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])
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; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINEONLY-NEXT: br label [[BB5]]
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; INSTCOMBINEONLY: bb5:
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; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[UMUL_OV]], [[BB2]] ]
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; INSTCOMBINEONLY-NEXT: ret i1 [[T6]]
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;
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; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_not_overflow(
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb:
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[UMUL_OV]]
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]]
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;
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_not_overflow(
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb:
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]])
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]]
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;
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bb:
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%t0 = icmp eq i64 %arg, 0
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br i1 %t0, label %bb5, label %bb2
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bb2: ; preds = %bb
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%t3 = udiv i64 -1, %arg
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%t4 = icmp ult i64 %t3, %arg1
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br label %bb5
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bb5: ; preds = %bb2, %bb
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%t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]
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ret i1 %t6
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}
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; Same as @will_not_overflow, but inverting return value.
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define i1 @will_overflow(i64 %arg, i64 %arg1) {
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; SIMPLIFYCFG-LABEL: @will_overflow(
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; SIMPLIFYCFG-NEXT: bb:
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; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
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; SIMPLIFYCFG: bb2:
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; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]]
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; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]
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; SIMPLIFYCFG-NEXT: br label [[BB5]]
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; SIMPLIFYCFG: bb5:
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; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]
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; SIMPLIFYCFG-NEXT: [[T7:%.*]] = xor i1 [[T6]], true
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; SIMPLIFYCFG-NEXT: ret i1 [[T7]]
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;
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; INSTCOMBINEONLY-LABEL: @will_overflow(
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; INSTCOMBINEONLY-NEXT: bb:
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; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
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; INSTCOMBINEONLY: bb2:
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; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])
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; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINEONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true
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; INSTCOMBINEONLY-NEXT: br label [[BB5]]
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; INSTCOMBINEONLY: bb5:
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; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHITMP]], [[BB2]] ]
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; INSTCOMBINEONLY-NEXT: ret i1 [[T6]]
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;
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; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_overflow(
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb:
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHITMP]]
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; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]]
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;
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_overflow(
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb:
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]])
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true
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; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[PHITMP]]
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;
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bb:
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%t0 = icmp eq i64 %arg, 0
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br i1 %t0, label %bb5, label %bb2
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bb2: ; preds = %bb
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%t3 = udiv i64 -1, %arg
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%t4 = icmp ult i64 %t3, %arg1
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br label %bb5
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bb5: ; preds = %bb2, %bb
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%t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]
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%t7 = xor i1 %t6, true
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ret i1 %t7
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}
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