74 lines
3.0 KiB
LLVM
74 lines
3.0 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -sccp -S < %s | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
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; rdar://11324230
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declare void @use(i1)
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define void @foo(<2 x i64>* %p) nounwind {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]]
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; CHECK: while.body.i:
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; CHECK-NEXT: [[VWORKEXPONENT_I_033:%.*]] = phi <4 x i32> [ [[SUB_I_I:%.*]], [[WHILE_BODY_I]] ], [ <i32 939524096, i32 939524096, i32 939524096, i32 939524096>, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[SUB_I_I]] = add <4 x i32> [[VWORKEXPONENT_I_033]], <i32 -8388608, i32 -8388608, i32 -8388608, i32 -8388608>
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SUB_I_I]] to <2 x i64>
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; CHECK-NEXT: store volatile <2 x i64> zeroinitializer, <2 x i64>* [[P:%.*]], align 16
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; CHECK-NEXT: br label [[WHILE_BODY_I]]
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;
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entry:
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br label %while.body.i
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while.body.i: ; preds = %while.body.i, %entry
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%vWorkExponent.i.033 = phi <4 x i32> [ %sub.i.i, %while.body.i ], [ <i32 939524096, i32 939524096, i32 939524096, i32 939524096>, %entry ]
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%sub.i.i = add <4 x i32> %vWorkExponent.i.033, <i32 -8388608, i32 -8388608, i32 -8388608, i32 -8388608>
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%0 = bitcast <4 x i32> %sub.i.i to <2 x i64>
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%and.i119.i = and <2 x i64> %0, zeroinitializer
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store volatile <2 x i64> %and.i119.i, <2 x i64>* %p
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br label %while.body.i
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}
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%union.V512 = type { <16 x float> }
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@i8_mix = dso_local global %union.V512 zeroinitializer
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declare <64 x i8> @llvm.abs.v64i8(<64 x i8>, i1 immarg)
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; Test for PR47991.
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define void @vec_cast_abs() {
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; CHECK-LABEL: @vec_cast_abs(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, <64 x i8>* bitcast (%union.V512* @i8_mix to <64 x i8>*), align 64
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.abs.v64i8(<64 x i8> [[TMP1]], i1 false)
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast <64 x i8> [[TMP2]] to i512
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i512 [[TMP3]], 12
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; CHECK-NEXT: call void @use(i1 [[CMP_1]])
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i512 [[TMP3]], 500
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; CHECK-NEXT: call void @use(i1 [[CMP_2]])
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i512 [[TMP3]] to i32
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; CHECK-NEXT: [[CMP_3:%.*]] = icmp eq i32 [[TMP4]], 12
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; CHECK-NEXT: call void @use(i1 [[CMP_3]])
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; CHECK-NEXT: [[CMP_4:%.*]] = icmp ult i32 [[TMP4]], 500
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; CHECK-NEXT: call void @use(i1 [[CMP_3]])
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp1 = load <64 x i8>, <64 x i8>* bitcast (%union.V512* @i8_mix to <64 x i8>*)
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%tmp2 = tail call <64 x i8> @llvm.abs.v64i8(<64 x i8> %tmp1, i1 false)
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%tmp3 = bitcast <64 x i8> %tmp2 to i512
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%cmp.1 = icmp eq i512 %tmp3, 12
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call void @use(i1 %cmp.1)
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%cmp.2 = icmp ult i512 %tmp3, 500
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call void @use(i1 %cmp.2)
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%tmp4 = trunc i512 %tmp3 to i32
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%cmp.3 = icmp eq i32 %tmp4, 12
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call void @use(i1 %cmp.3)
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%cmp.4 = icmp ult i32 %tmp4, 500
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call void @use(i1 %cmp.3)
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ret void
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}
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