491 lines
15 KiB
C
491 lines
15 KiB
C
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//==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// Contains matchers for matching SSA Machine Instructions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_GMIR_PATTERNMATCH_H
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#define LLVM_GMIR_PATTERNMATCH_H
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/InstrTypes.h"
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namespace llvm {
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namespace MIPatternMatch {
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template <typename Reg, typename Pattern>
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bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P) {
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return P.match(MRI, R);
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}
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// TODO: Extend for N use.
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template <typename SubPatternT> struct OneUse_match {
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SubPatternT SubPat;
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OneUse_match(const SubPatternT &SP) : SubPat(SP) {}
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bool match(const MachineRegisterInfo &MRI, Register Reg) {
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return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg);
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}
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};
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template <typename SubPat>
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inline OneUse_match<SubPat> m_OneUse(const SubPat &SP) {
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return SP;
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}
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template <typename SubPatternT> struct OneNonDBGUse_match {
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SubPatternT SubPat;
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OneNonDBGUse_match(const SubPatternT &SP) : SubPat(SP) {}
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bool match(const MachineRegisterInfo &MRI, Register Reg) {
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return MRI.hasOneNonDBGUse(Reg) && SubPat.match(MRI, Reg);
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}
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};
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template <typename SubPat>
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inline OneNonDBGUse_match<SubPat> m_OneNonDBGUse(const SubPat &SP) {
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return SP;
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}
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struct ConstantMatch {
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int64_t &CR;
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ConstantMatch(int64_t &C) : CR(C) {}
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bool match(const MachineRegisterInfo &MRI, Register Reg) {
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if (auto MaybeCst = getConstantVRegSExtVal(Reg, MRI)) {
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CR = *MaybeCst;
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return true;
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}
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return false;
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}
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};
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inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); }
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/// Matcher for a specific constant value.
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struct SpecificConstantMatch {
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int64_t RequestedVal;
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SpecificConstantMatch(int64_t RequestedVal) : RequestedVal(RequestedVal) {}
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bool match(const MachineRegisterInfo &MRI, Register Reg) {
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int64_t MatchedVal;
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return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal;
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}
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};
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/// Matches a constant equal to \p RequestedValue.
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inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) {
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return SpecificConstantMatch(RequestedValue);
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}
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///{
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/// Convenience matchers for specific integer values.
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inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); }
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inline SpecificConstantMatch m_AllOnesInt() {
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return SpecificConstantMatch(-1);
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}
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///}
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// TODO: Rework this for different kinds of MachineOperand.
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// Currently assumes the Src for a match is a register.
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// We might want to support taking in some MachineOperands and call getReg on
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// that.
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struct operand_type_match {
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bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; }
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bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) {
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return MO->isReg();
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}
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};
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inline operand_type_match m_Reg() { return operand_type_match(); }
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/// Matching combinators.
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template <typename... Preds> struct And {
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template <typename MatchSrc>
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bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
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return true;
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}
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};
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template <typename Pred, typename... Preds>
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struct And<Pred, Preds...> : And<Preds...> {
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Pred P;
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And(Pred &&p, Preds &&... preds)
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: And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
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}
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template <typename MatchSrc>
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bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
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return P.match(MRI, src) && And<Preds...>::match(MRI, src);
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}
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};
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template <typename... Preds> struct Or {
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template <typename MatchSrc>
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bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
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return false;
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}
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};
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template <typename Pred, typename... Preds>
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struct Or<Pred, Preds...> : Or<Preds...> {
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Pred P;
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Or(Pred &&p, Preds &&... preds)
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: Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {}
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template <typename MatchSrc>
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bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
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return P.match(MRI, src) || Or<Preds...>::match(MRI, src);
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}
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};
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template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
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return And<Preds...>(std::forward<Preds>(preds)...);
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}
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template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) {
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return Or<Preds...>(std::forward<Preds>(preds)...);
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}
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template <typename BindTy> struct bind_helper {
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static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) {
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VR = V;
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return true;
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}
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};
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template <> struct bind_helper<MachineInstr *> {
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static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
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Register Reg) {
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MI = MRI.getVRegDef(Reg);
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if (MI)
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return true;
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return false;
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}
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};
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template <> struct bind_helper<LLT> {
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static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg) {
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Ty = MRI.getType(Reg);
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if (Ty.isValid())
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return true;
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return false;
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}
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};
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template <> struct bind_helper<const ConstantFP *> {
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static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F,
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Register Reg) {
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F = getConstantFPVRegVal(Reg, MRI);
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if (F)
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return true;
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return false;
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}
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};
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template <typename Class> struct bind_ty {
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Class &VR;
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bind_ty(Class &V) : VR(V) {}
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template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) {
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return bind_helper<Class>::bind(MRI, VR, V);
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}
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};
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inline bind_ty<Register> m_Reg(Register &R) { return R; }
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inline bind_ty<MachineInstr *> m_MInstr(MachineInstr *&MI) { return MI; }
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inline bind_ty<LLT> m_Type(LLT Ty) { return Ty; }
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inline bind_ty<CmpInst::Predicate> m_Pred(CmpInst::Predicate &P) { return P; }
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inline operand_type_match m_Pred() { return operand_type_match(); }
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// Helper for matching G_FCONSTANT
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inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; }
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// General helper for all the binary generic MI such as G_ADD/G_SUB etc
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template <typename LHS_P, typename RHS_P, unsigned Opcode,
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bool Commutable = false>
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struct BinaryOp_match {
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LHS_P L;
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RHS_P R;
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BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
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template <typename OpTy>
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bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
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MachineInstr *TmpMI;
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if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
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if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
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return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
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R.match(MRI, TmpMI->getOperand(2).getReg())) ||
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(Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
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L.match(MRI, TmpMI->getOperand(2).getReg())));
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}
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}
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return false;
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}
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};
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
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m_GAdd(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, true>
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m_GPtrAdd(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB> m_GSub(const LHS &L,
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const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>
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m_GMul(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>
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m_GFAdd(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>
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m_GFMul(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false>
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m_GFSub(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>
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m_GAnd(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true>
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m_GXor(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true> m_GOr(const LHS &L,
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const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>
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m_GShl(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>
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m_GLShr(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>(L, R);
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}
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template <typename LHS, typename RHS>
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inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false>
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m_GAShr(const LHS &L, const RHS &R) {
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return BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false>(L, R);
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}
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// Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc
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template <typename SrcTy, unsigned Opcode> struct UnaryOp_match {
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SrcTy L;
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UnaryOp_match(const SrcTy &LHS) : L(LHS) {}
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template <typename OpTy>
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bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
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MachineInstr *TmpMI;
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if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
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if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
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return L.match(MRI, TmpMI->getOperand(1).getReg());
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}
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}
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return false;
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}
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};
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template <typename SrcTy>
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inline UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>
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m_GAnyExt(const SrcTy &Src) {
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return UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>(Src);
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}
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template <typename SrcTy>
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inline UnaryOp_match<SrcTy, TargetOpcode::G_SEXT> m_GSExt(const SrcTy &Src) {
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return UnaryOp_match<SrcTy, TargetOpcode::G_SEXT>(Src);
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}
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template <typename SrcTy>
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inline UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT> m_GZExt(const SrcTy &Src) {
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return UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT>(Src);
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}
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template <typename SrcTy>
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inline UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT> m_GFPExt(const SrcTy &Src) {
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return UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT>(Src);
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}
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template <typename SrcTy>
|
||
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|
inline UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC> m_GTrunc(const SrcTy &Src) {
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||
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|
return UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC>(Src);
|
||
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|
}
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||
|
|
|
||
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|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>
|
||
|
|
m_GBitcast(const SrcTy &Src) {
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||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>
|
||
|
|
m_GPtrToInt(const SrcTy &Src) {
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||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>
|
||
|
|
m_GIntToPtr(const SrcTy &Src) {
|
||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>
|
||
|
|
m_GFPTrunc(const SrcTy &Src) {
|
||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_FABS> m_GFabs(const SrcTy &Src) {
|
||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_FABS>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::G_FNEG> m_GFNeg(const SrcTy &Src) {
|
||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::G_FNEG>(Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline UnaryOp_match<SrcTy, TargetOpcode::COPY> m_Copy(SrcTy &&Src) {
|
||
|
|
return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
|
||
|
|
}
|
||
|
|
|
||
|
|
// General helper for generic MI compares, i.e. G_ICMP and G_FCMP
|
||
|
|
// TODO: Allow checking a specific predicate.
|
||
|
|
template <typename Pred_P, typename LHS_P, typename RHS_P, unsigned Opcode>
|
||
|
|
struct CompareOp_match {
|
||
|
|
Pred_P P;
|
||
|
|
LHS_P L;
|
||
|
|
RHS_P R;
|
||
|
|
|
||
|
|
CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS)
|
||
|
|
: P(Pred), L(LHS), R(RHS) {}
|
||
|
|
|
||
|
|
template <typename OpTy>
|
||
|
|
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
|
||
|
|
MachineInstr *TmpMI;
|
||
|
|
if (!mi_match(Op, MRI, m_MInstr(TmpMI)) || TmpMI->getOpcode() != Opcode)
|
||
|
|
return false;
|
||
|
|
|
||
|
|
auto TmpPred =
|
||
|
|
static_cast<CmpInst::Predicate>(TmpMI->getOperand(1).getPredicate());
|
||
|
|
if (!P.match(MRI, TmpPred))
|
||
|
|
return false;
|
||
|
|
|
||
|
|
return L.match(MRI, TmpMI->getOperand(2).getReg()) &&
|
||
|
|
R.match(MRI, TmpMI->getOperand(3).getReg());
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
template <typename Pred, typename LHS, typename RHS>
|
||
|
|
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>
|
||
|
|
m_GICmp(const Pred &P, const LHS &L, const RHS &R) {
|
||
|
|
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>(P, L, R);
|
||
|
|
}
|
||
|
|
|
||
|
|
template <typename Pred, typename LHS, typename RHS>
|
||
|
|
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>
|
||
|
|
m_GFCmp(const Pred &P, const LHS &L, const RHS &R) {
|
||
|
|
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>(P, L, R);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Helper for checking if a Reg is of specific type.
|
||
|
|
struct CheckType {
|
||
|
|
LLT Ty;
|
||
|
|
CheckType(const LLT Ty) : Ty(Ty) {}
|
||
|
|
|
||
|
|
bool match(const MachineRegisterInfo &MRI, Register Reg) {
|
||
|
|
return MRI.getType(Reg) == Ty;
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
inline CheckType m_SpecificType(LLT Ty) { return Ty; }
|
||
|
|
|
||
|
|
template <typename Src0Ty, typename Src1Ty, typename Src2Ty, unsigned Opcode>
|
||
|
|
struct TernaryOp_match {
|
||
|
|
Src0Ty Src0;
|
||
|
|
Src1Ty Src1;
|
||
|
|
Src2Ty Src2;
|
||
|
|
|
||
|
|
TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
|
||
|
|
: Src0(Src0), Src1(Src1), Src2(Src2) {}
|
||
|
|
template <typename OpTy>
|
||
|
|
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
|
||
|
|
MachineInstr *TmpMI;
|
||
|
|
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
|
||
|
|
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 4) {
|
||
|
|
return (Src0.match(MRI, TmpMI->getOperand(1).getReg()) &&
|
||
|
|
Src1.match(MRI, TmpMI->getOperand(2).getReg()) &&
|
||
|
|
Src2.match(MRI, TmpMI->getOperand(3).getReg()));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
};
|
||
|
|
template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
|
||
|
|
inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
|
||
|
|
TargetOpcode::G_INSERT_VECTOR_ELT>
|
||
|
|
m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
|
||
|
|
return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
|
||
|
|
TargetOpcode::G_INSERT_VECTOR_ELT>(Src0, Src1, Src2);
|
||
|
|
}
|
||
|
|
|
||
|
|
/// Matches a register negated by a G_SUB.
|
||
|
|
/// G_SUB 0, %negated_reg
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline BinaryOp_match<SpecificConstantMatch, SrcTy, TargetOpcode::G_SUB>
|
||
|
|
m_Neg(const SrcTy &&Src) {
|
||
|
|
return m_GSub(m_ZeroInt(), Src);
|
||
|
|
}
|
||
|
|
|
||
|
|
/// Matches a register not-ed by a G_XOR.
|
||
|
|
/// G_XOR %not_reg, -1
|
||
|
|
template <typename SrcTy>
|
||
|
|
inline BinaryOp_match<SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true>
|
||
|
|
m_Not(const SrcTy &&Src) {
|
||
|
|
return m_GXor(Src, m_AllOnesInt());
|
||
|
|
}
|
||
|
|
|
||
|
|
} // namespace GMIPatternMatch
|
||
|
|
} // namespace llvm
|
||
|
|
|
||
|
|
#endif
|