30 lines
1.2 KiB
TableGen
30 lines
1.2 KiB
TableGen
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//===--- HexagonIICHVX.td -------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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def CVI_GATHER_PSEUDO : InstrItinClass;
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def CVI_VA : InstrItinClass;
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class HVXItin {
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list<InstrItinData> HVXItin_list = [
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InstrItinData<CVI_VA,
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[InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
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InstrStage<1, [CVI_XLANE,CVI_SHIFT, CVI_MPY0, CVI_MPY1]>],
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[9, 7, 7, 7], [HVX_FWD, HVX_FWD, HVX_FWD]>,
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// Used by gather pseudo-instructions which are expanded into V6_vgather*
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// and V6_vS32b_new_ai. Even though these instructions use CVI_LD resource,
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// it's not included below to avoid having more than 4 InstrStages and
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// thus changing 'MaxResTerms' to 5. Instead, both SLOT0 and SLOT1 are
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// used, which should be sufficient.
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InstrItinData <CVI_GATHER_PSEUDO,
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[InstrStage<1, [SLOT0], 0>,
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InstrStage<1, [SLOT1], 0>,
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InstrStage<1, [CVI_ST], 0>,
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InstrStage<1, [CVI_MPY01, CVI_XLSHF]>]>];
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}
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