llvm-for-llvmta/test/Bitcode/vscale-round-trip.ll

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2022-04-25 10:02:23 +02:00
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"
@important_val = extern_weak dso_local global i32, align 4
; CHECK-LABEL: define <vscale x 4 x i32> @const_shufflevector(
; CHECK: <vscale x 4 x i32> shufflevector (<vscale x 4 x i32>
define <vscale x 4 x i32> @const_shufflevector() {
ret <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> zeroinitializer,
<vscale x 4 x i32> undef,
<vscale x 4 x i32> zeroinitializer)
}
; CHECK-LABEL: define <vscale x 4 x i32> @const_shufflevector_ex()
; CHECK: <vscale x 4 x i32> shufflevector (<vscale x 2 x i32>
define <vscale x 4 x i32> @const_shufflevector_ex() {
ret <vscale x 4 x i32> shufflevector (<vscale x 2 x i32> zeroinitializer,
<vscale x 2 x i32> undef,
<vscale x 4 x i32> zeroinitializer)
}
; CHECK-LABEL: define <vscale x 4 x i32> @non_const_shufflevector(
; CHECK: %res = shufflevector <vscale x 4 x i32>
define <vscale x 4 x i32> @non_const_shufflevector(<vscale x 4 x i32> %lhs,
<vscale x 4 x i32> %rhs) {
%res = shufflevector <vscale x 4 x i32> %lhs,
<vscale x 4 x i32> %rhs,
<vscale x 4 x i32> zeroinitializer
ret <vscale x 4 x i32> %res
}
; CHECK-LABEL: define <vscale x 4 x i32> @const_select()
; CHECK: <vscale x 4 x i32> select (<vscale x 4 x i1>
define <vscale x 4 x i32> @const_select() {
ret <vscale x 4 x i32> select
(<vscale x 4 x i1> insertelement
(<vscale x 4 x i1> undef,
i1 icmp ne (i32* @important_val, i32* null),
i32 0),
<vscale x 4 x i32> zeroinitializer,
<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 1, i32 0))
}