117 lines
4.9 KiB
LLVM
117 lines
4.9 KiB
LLVM
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; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false %s -o - | FileCheck -enable-var-scope %s
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; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false -mattr=+outline-atomics %s -o - | FileCheck -enable-var-scope %s --check-prefix=OUTLINE-ATOMICS
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define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind {
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; OUTLINE-ATOMICS: bl __aarch64_cas1_acq_rel
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; CHECK-LABEL: test_cmpxchg_8:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxrb [[OLD:w[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], w1, uxtb
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; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxrb [[STATUS:w[0-9]+]], w2, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: subs {{w[0-9]+}}, [[OLD]], w1, uxtb
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; CHECK: cset {{w[0-9]+}}, eq
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%res = cmpxchg i8* %addr, i8 %desired, i8 %new seq_cst monotonic
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ret { i8, i1 } %res
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}
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define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind {
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; OUTLINE-ATOMICS: bl __aarch64_cas2_acq_rel
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; CHECK-LABEL: test_cmpxchg_16:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxrh [[OLD:w[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], w1, uxth
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; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxrh [[STATUS:w[3-9]]], w2, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: subs {{w[0-9]+}}, [[OLD]], w1
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; CHECK: cset {{w[0-9]+}}, eq
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%res = cmpxchg i16* %addr, i16 %desired, i16 %new seq_cst monotonic
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ret { i16, i1 } %res
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}
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define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind {
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; OUTLINE-ATOMICS: bl __aarch64_cas4_acq_rel
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; CHECK-LABEL: test_cmpxchg_32:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxr [[OLD:w[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], w1
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; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxr [[STATUS:w[0-9]+]], w2, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: subs {{w[0-9]+}}, [[OLD]], w1
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; CHECK: cset {{w[0-9]+}}, eq
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%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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ret { i32, i1 } %res
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}
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define { i64, i1 } @test_cmpxchg_64(i64* %addr, i64 %desired, i64 %new) nounwind {
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; OUTLINE-ATOMICS: bl __aarch64_cas8_acq_rel
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; CHECK-LABEL: test_cmpxchg_64:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxr [[OLD:x[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], x1
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; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxr [[STATUS:w[0-9]+]], x2, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: subs {{x[0-9]+}}, [[OLD]], x1
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; CHECK: cset {{w[0-9]+}}, eq
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%res = cmpxchg i64* %addr, i64 %desired, i64 %new seq_cst monotonic
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ret { i64, i1 } %res
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}
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define { i128, i1 } @test_cmpxchg_128(i128* %addr, i128 %desired, i128 %new) nounwind {
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; OUTLINE-ATOMICS: bl __aarch64_cas16_acq_rel
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; CHECK-LABEL: test_cmpxchg_128:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD_LO]], x2
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; CHECK: cset [[CMP_TMP:w[0-9]+]], ne
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; CHECK: cmp [[OLD_HI]], x3
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; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne
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; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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%res = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst monotonic
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ret { i128, i1 } %res
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}
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; Original implementation assumed the desired & new arguments had already been
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; type-legalized into some kind of BUILD_PAIR operation and crashed when this
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; was false.
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@var128 = dso_local global i128 0
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define {i128, i1} @test_cmpxchg_128_unsplit(i128* %addr) {
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; OUTLINE-ATOMICS: bl __aarch64_cas16_acq_rel
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; CHECK-LABEL: test_cmpxchg_128_unsplit:
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; CHECK: mov [[ADDR:x[0-9]+]], x0
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; CHECK: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var128
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; CHECK: ldp [[DESIRED_LO:x[0-9]+]], [[DESIRED_HI:x[0-9]+]], [x[[VAR128]]]
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; CHECK: ldp [[NEW_LO:x[0-9]+]], [[NEW_HI:x[0-9]+]], [x[[VAR128]]]
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD_LO]], [[DESIRED_LO]]
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; CHECK: cset [[CMP_TMP:w[0-9]+]], ne
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; CHECK: cmp [[OLD_HI]], [[DESIRED_HI]]
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; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne
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; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: stlxp [[STATUS:w[0-9]+]], [[NEW_LO]], [[NEW_HI]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cbnz [[STATUS]], [[RETRY]]
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; CHECK: [[DONE]]:
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%desired = load volatile i128, i128* @var128
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%new = load volatile i128, i128* @var128
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%val = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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ret { i128, i1 } %val
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}
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